VEAP: Global optimization based efficient algorithm for VLSI placement. - Tianming Kong; Xianlong Hong; Changge Qiao (ASP-DAC, 1997)

Relaxed Simulated Tempering for VLSI Floorplan Designs. - Jason Cong; Tianming Kong; Dongmin Xu; Faming Liang; Jun S. Liu; Wing Hung Wong (ASP-DAC, 1999)

Buffer block planning for interconnect-driven floorplanning. - Jason Cong; Tianming Kong; David Zhigang Pan (ICCAD, 1999)

Dynamic weighting Monte Carlo for constrained floorplan designs in mixed signal application. - Jason Cong; Tianming Kong; Faming Liang; Jun S. Liu; Wing Hung Wong; Dongmin Xu (ASP-DAC, 2000)

Multilevel Optimization for Large-Scale Circuit Placement. - Tony F. Chan; Jason Cong; Tianming Kong; Joseph R. Shinnerl (ICCAD, 2000)

Buffer block planning for interconnect planning and prediction. - Jason Cong; Tianming Kong; Z. D. Pan (IEEE Trans. Very Large Scale Integr. Syst., 2001)