Tianqi Tang

Orcid: 0000-0001-8255-985X

Affiliations:
  • Meta, USA
  • University of California at Santa Barbara, Santa Barbara, CA, USA (former)


According to our database1, Tianqi Tang authored at least 24 papers between 2014 and 2022.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Other 

Links

Online presence:

On csauthors.net:

Bibliography

2022
Cost-Aware Exploration for Chiplet-Based Architecture with Advanced Packaging Technologies.
CoRR, 2022

Faith: An Efficient Framework for Transformer Verification on GPUs.
Proceedings of the 2022 USENIX Annual Technical Conference, 2022

2021
Rescuing RRAM-Based Computing From Static and Dynamic Faults.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021

NeuroMeter: An Integrated Power, Area, and Timing Modeling Framework for Machine Learning Accelerators Industry Track Paper.
Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, 2021

2020
Low Bit-Width Convolutional Neural Network on RRAM.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020

2018
Towards Real-Time Object Detection on Embedded Systems.
IEEE Trans. Emerg. Top. Comput., 2018

MNSIM: Simulation Platform for Memristor-Based Neuromorphic Computing System.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018

Stuck-at Fault Tolerance in RRAM Computing Systems.
IEEE J. Emerg. Sel. Topics Circuits Syst., 2018

Real-time object detection towards high power efficiency.
Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018

Training low bitwidth convolutional neural network on RRAM.
Proceedings of the 23rd Asia and South Pacific Design Automation Conference, 2018

2017
Binary convolutional neural network on RRAM.
Proceedings of the 22nd Asia and South Pacific Design Automation Conference, 2017

Computation-oriented fault-tolerance schemes for RRAM computing systems.
Proceedings of the 22nd Asia and South Pacific Design Automation Conference, 2017

2016
Technological Exploration of RRAM Crossbar Array for Matrix-Vector Multiplication.
J. Comput. Sci. Technol., 2016

Low power Convolutional Neural Networks on a chip.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016

Going Deeper with Embedded FPGA Platform for Convolutional Neural Network.
Proceedings of the 2016 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2016

MNSIM: Simulation platform for memristor-based neuromorphic computing system.
Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016

Switched by input: power efficient structure for RRAM-based convolutional neural network.
Proceedings of the 53rd Annual Design Automation Conference, 2016

RRAM based learning acceleration.
Proceedings of the 2016 International Conference on Compilers, 2016

2015
Energy-efficient neuromorphic computation based on compound spin synapse with stochastic learning.
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015

Rebooting Computing and Low-Power Image Recognition Challenge.
Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2015

Energy Efficient RRAM Spiking Neural Network for Real Time Classification.
Proceedings of the 25th edition on Great Lakes Symposium on VLSI, GLVLSI 2015, Pittsburgh, PA, USA, May 20, 2015

Spiking neural network with RRAM: can we use it for real-world application?
Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015

Technological exploration of RRAM crossbar array for matrix-vector multiplication.
Proceedings of the 20th Asia and South Pacific Design Automation Conference, 2015

2014
Energy efficient spiking neural network design with RRAM devices.
Proceedings of the 2014 International Symposium on Integrated Circuits (ISIC), 2014


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