MIMS: Towards a Message Interface based Memory System - Licheng Chen; Tianyue Lu; Yanan Wang; Mingyu Chen 001; Yuan Ruan; Zehan Cui; Yongbing Huang; Mingyang Chen; Jiutian Zhang; Yungang Bao (CoRR, 2013)

Achieving efficient packet-based memory system by exploiting correlation of memory requests. - Tianyue Lu; Licheng Chen; Mingyu Chen 001 (DATE, 2014)

MIMS: Towards a Message Interface Based Memory System. - Licheng Chen; Mingyu Chen 001; Yuan Ruan; Yongbing Huang; Zehan Cui; Tianyue Lu; Yungang Bao (J. Comput. Sci. Technol., 2014)

Twin-Load: Building a Scalable Memory System over the Non-Scalable Interface. - Zehan Cui; Tianyue Lu; Haiyang Pan; Sally A. McKee; Mingyu Chen 001 (CoRR, 2015)

Twin-Load: Bridging the Gap between Conventional Direct-Attached and Buffer-on-Board Memory Systems. - Zehan Cui; Tianyue Lu; Sally A. McKee; Mingyu Chen 001; Haiyang Pan; Yuan Ruan (MEMSYS, 2016)

TDV Cache: Organizing Off-Chip DRAM Cache of NVMM from a Fusion Perspective. - Tianyue Lu; Yuhang Liu 001; Haiyang Pan; Mingyu Chen 001 (ICCD, 2017)

Fine-Grained Data Committing for Persistent Memory. - Tianyue Lu; Yuhang Liu 001; Mingyu Chen 001 (ISPA/IUCC, 2017)

Characterizations and Architectural Implications of NVM's External DRAM Cache. - Haiyang Pan; Yuhang Liu 001; Tianyue Lu; Mingyu Chen 001 (HPCC/SmartCity/DSS, 2019)

Make Page Coloring more Efficient on Slice-Based Three-Level Cache. - Haifeng Li; Tianyue Lu; Yuhang Liu 001; Mingyu Chen 001 (ICPADS, 2019)

System measurement of Intel AEP Optane DIMM. - Tianyue Lu; Haiyang Pan; Mingyu Chen 001 (CoRR, 2020)

LSP: Collective Cross-Page Prefetching for NVM. - Haiyang Pan; Yuhang Liu 001; Tianyue Lu; Mingyu Chen 001 (DATE, 2021)

Asynchronous Memory Access Unit for General Purpose Processors. - Luming Wang; Xu Zhang 033; Tianyue Lu; Mingyu Chen 001 (CoRR, 2021)

GraFF: A Multi-FPGA System with Memory Semantic Fabric for Scalable Graph Processing. - Xu Zhang 033; Yisong Chang; Tianyue Lu; Ke Liu 004; Ke Zhang 017; Mingyu Chen 001 (FPT, 2022)

Rethinking Design Paradigm of Graph Processing System with a CXL-like Memory Semantic Fabric. - Xu Zhang 033; Yisong Chang; Tianyue Lu; Ke Zhang 017; Mingyu Chen 001 (CCGrid, 2023)

MARB: Bridge the Semantic Gap between Operating System and Application Memory Access Behavior. - Haifeng Li; Ke Liu 004; Ting Liang; Zuojun Li; Tianyue Lu; Yisong Chang; Hui Yuan; Yinben Xia; Yungang Bao; Mingyu Chen 001; Yizhou Shan (DATE, 2023)

HoPP: Hardware-Software Co-Designed Page Prefetching for Disaggregated Memory. - Haifeng Li; Ke Liu 004; Ting Liang; Zuojun Li; Tianyue Lu; Hui Yuan; Yinben Xia; Yungang Bao; Mingyu Chen 001; Yizhou Shan (HPCA, 2023)

Morpheus: An Adaptive DRAM Cache with Online Granularity Adjustment for Disaggregated Memory. - Xu Zhang 033; Tianyue Lu; Yisong Chang; Ke Zhang 017; Mingyu Chen 001 (ICCD, 2023)

DASICS: Enhancing Memory Protection with Dynamic Compartmentalization. - Yue Jin; Yibin Xu; Chengyuan Yang; Han Wang; Tianyi Huang; Tianyue Lu; Mingyu Chen 001 (CoRR, 2023)

Asynchronous Memory Access Unit: Exploiting Massive Parallelism for Far Memory Access. - Luming Wang; Xu Zhang 033; Songyue Wang; Zhuolun Jiang; Tianyue Lu; Mingyu Chen 001; Siwei Luo; Keji Huang (ACM Trans. Archit. Code Optim., 2024)