Parallel Dynamic Partition and Adaptive Computation in Semiconductor Device Simulation. - Yiming Li; Jinn-Liang Liu; Tien-Sheng Chao; S. M. Sze (PP, 2001)

A Practical Implementation of Parallel Dynamic Load Balancing for Adaptive Computing in VLSI Device Simulation. - Yiming Li 005; S. M. Sze; Tien-Sheng Chao (Eng. Comput., 2002)

High voltage applications and NBTI effects of DT-pMOSFETS with reverse Schottky substrate contacts. - Yao-Jen Lee; Tien-Sheng Chao; Tiao-Yuan Huang (Microelectron. Reliab., 2005)

A simple method for sub-100 nm pattern generation with I-line double-patterning technique. - Tzu-I Tsai; Horng-Chih Lin; Min-Feng Jian; Tiao-Yuan Huang; Tien-Sheng Chao (Microelectron. Reliab., 2010)

Improvement in pH Sensitivity of Low-Temperature Polycrystalline-Silicon Thin-Film Transistor Sensors Using H2 Sintering. - Li-Chen Yen; Ming-Tsyr Tang; Fang-Yu Chang; Tung-Ming Pan; Tien-Sheng Chao; Chiang-Hsuan Lee (Sensors, 2014)

Aggressively Scaled Atomic Layer Deposited Amorphous InZnOx Thin Film Transistor Exhibiting Prominent Short Channel Characteristics (SS= 69 mV/dec.; DIBL = 27.8 mV/V) and High Gm(802 μS/μm at VDS = 2V). - Yan-Kui Liang; June-Yang Zheng; Yu-Lon Lin; Wei-Li Li; Yu-Cheng Lu; Dong-Ru Hsieh; Li-Chi Peng; Tsung-Te Chou; Chi-Chung Kei; Chun-Chieh Lu; Huai-Ying Huang; Yuan-Chieh Tseng; et al. (VLSI Technology and Circuits, 2023)