7.3 A resistance-drift compensation scheme to reduce MLC PCM raw BER by over 100× for storage-class memory applications. - Win-San Khwa; Meng-Fan Chang; Jau-Yi Wu; Ming-Hsiu Lee; Tzu-Hsiang Su; Keng-Hao Yang; Tien-Fu Chen; Tien-Yen Wang; Hsiang-Pang Li; Matthew BrightSky; SangBum Kim; Hsiang-Lam Lung; et al. (ISSCC, 2016)

A Resistance Drift Compensation Scheme to Reduce MLC PCM Raw BER by Over 100× for Storage Class Memory Applications. - Win-San Khwa; Meng-Fan Chang; Jau-Yi Wu; Ming-Hsiu Lee; Tzu-Hsiang Su; Keng-Hao Yang; Tien-Fu Chen; Tien-Yen Wang; Hsiang-Pang Li; Matthew J. BrightSky; SangBum Kim; Hsiang-Lam Lung; et al. (IEEE J. Solid State Circuits, 2017)