An Investigation of Reconfigurable Multipliers for Use in Adaptive Signal Processing. - Tim Courtney; Richard H. Turner; Roger F. Woods (FCCM, 2000)

Multiplexer Based Reconfiguration for Virtex Multipliers. - Tim Courtney; Richard H. Turner; Roger F. Woods (FPL, 2000)

Implementation of fixed DSP functions using the reduced coefficient multiplier. - Richard H. Turner; Tim Courtney; Roger F. Woods (ICASSP, 2001)

Mapping Multi-Mode Circuits to LUT-Based FPGA Using Embedded MUXes. - Tim Courtney; Richard H. Turner; Roger F. Woods (FCCM, 2002)

Multiplier-less Realization of a Poly-phase Filter Using LUT-based FPGAs. - Richard H. Turner; Roger F. Woods; Tim Courtney (FPL, 2002)

Exploring run-time reconfiguration on programmable logic for DSP and telecommunications applications. - Tim Courtney (2003)

Comparison of SBOD and MBOD Under SPC-1 Traffic. - Tim Courtney; Franck Chevalier (Parallel and Distributed Computing and Networks, 2005)

Novel Technique for Accelerated Simulation of Storage Systems. - Tim Courtney; Franck Chevalier; Yan Li 031 (Parallel and Distributed Computing and Networks, 2006)