Dynamic Adaptive Pre-Tenuring. - Timothy L. Harris (ISMM, 2000)

A Pragmatic Implementation of Non-blocking Linked-Lists. - Timothy L. Harris (DISC, 2001)

Storage, Mutability and Naming in Pasta. - Tim D. Moreton; Ian A. Pratt; Timothy L. Harris (NETWORKING Workshops, 2002)

Dependable software needs pervasive debugging. - Timothy L. Harris (ACM SIGOPS European Workshop, 2002)

A Practical Multi-word Compare-and-Swap Operation. - Timothy L. Harris; Keir Fraser; Ian A. Pratt (DISC, 2002)

Extensible virtual machines. - Timothy L. Harris (2002)

Operating Systems - Concurrent and Distributed Software Design. - Jean Bacon; Tim Harris 001 (Addison-Wesley, 2003)

XenoSearch: Distributed Resource Discovery in the XenoServer Open Platform. - David Spence; Tim Harris 001 (HPDC, 2003)

Lighthouses for Scalable Distributed Location. - Marcelo Pias; Jon Crowcroft; Steve R. Wilbur; Tim Harris 001; Saleem N. Bhatti (IPTPS, 2003)

Managing Trust and Reputation in the XenoServer Open Platform. - Boris Dragovic; Steven Hand 001; Tim Harris 001; Evangelos Kotsovinos; Andrew Twigg (iTrust, 2003)

Xen and the art of virtualization. - Paul Barham 001; Boris Dragovic; Keir Fraser; Steven Hand 001; Tim Harris 001; Alex Ho; Rolf Neugebauer; Ian Pratt 001; Andrew Warfield (SOSP, 2003)

PDB: Pervasive Debugging With Xen. - Alex Ho; Steven Hand 001; Tim Harris 001 (GRID, 2004)

Global-scale Service Deployment in the XenoServer Platform. - Evangelos Kotsovinos; Tim D. Moreton; Ian Pratt 001; Russ Ross; Keir Fraser; Steven Hand 001; Tim Harris 001 (WORLDS, 2004)

Brief announcement: implementing multi-word atomic snapshots on current hardware. - Chris Purcell; Tim Harris 001 (PODC, 2004)

Location based placement of whole distributed systems. - David Spence; Jon Crowcroft; Steven Hand 001; Tim Harris 001 (CoNEXT, 2005)

Haskell on a shared-memory multiprocessor. - Tim Harris 001; Simon Marlow; Simon L. Peyton Jones (Haskell, 2005)

Revocable locks for non-blocking programming. - Tim Harris 001; Keir Fraser (PPoPP, 2005)

Non-blocking Hashtables with Open Addressing. - Chris Purcell; Tim Harris 001 (DISC, 2005)

Exceptions and side-effects in atomic blocks. - Tim Harris 001 (Sci. Comput. Program., 2005)

Lock Free Data Structures Using STM in Haskell. - Anthony Discolo; Tim Harris 001; Simon Marlow; Simon L. Peyton Jones; Satnam Singh (FLOPS, 2006)

Securing Software by Enforcing Data-flow Integrity. - Miguel Castro 001; Manuel Costa; Tim Harris 001 (OSDI, 2006)

Resource Management for Global Public Computing: Many Policies Are Better Than (N)one. - Evangelos Kotsovinos; Iulia Ion; Tim Harris 001 (WORLDS, 2006)

Optimizing memory transactions. - Tim Harris 001; Mark Plesko; Avraham Shinnar; David Tarditi (PLDI, 2006)

Special issue on synchronization and concurrency in object-oriented languages. - Tim Harris 001; Doug Lea (Sci. Comput. Program., 2006)

Feedback directed implicit parallelism. - Tim Harris 001; Satnam Singh (ICFP, 2007)

Featherweight transactions: decoupling threads and atomic blocks. - Virendra J. Marathe; Tim Harris 001; James R. Larus (PPoPP, 2007)

Transactional Memory: An Overview. - Tim Harris 001; Adrián Cristal; Osman S. Unsal; Eduard Ayguadé; Fabrizio Gagliardi; Burton Smith; Mateo Valero (IEEE Micro, 2007)

Concurrent programming without locks. - Keir Fraser; Tim Harris 001 (ACM Trans. Comput. Syst., 2007)

The limits of software transactional memory (STM): dissecting Haskell STM applications on a many-core environment. - Cristian Perfumo; Nehir Sönmez; Srdjan Stipic; Osman S. Unsal; Adrián Cristal; Tim Harris 001; Mateo Valero (Conf. Computing Frontiers, 2008)

08241 Abstracts Collection - Transactional Memory : From Implementation to Application. - Christof Fetzer; Tim Harris 001; Maurice Herlihy; Nir Shavit (Transactional Memory: From Implementation to Application, 2008)

08241 Summary - Transactional Memory : From Implementation to Application. - Christof Fetzer; Tim Harris 001; Maurice Herlihy; Nir Shavit (Transactional Memory: From Implementation to Application, 2008)

Parallel generational-copying garbage collection with a block-structured heap. - Simon Marlow; Tim Harris 001; Roshan P. James; Simon L. Peyton Jones (ISMM, 2008)

WormBench: a configurable workload for evaluating transactional memory systems. - Ferad Zyulkyarov; Adrián Cristal; Sanja Cvijic; Eduard Ayguadé; Mateo Valero; Osman S. Unsal; Tim Harris 001 (MEDEA@PACT, 2008)

Composable memory transactions. - Tim Harris 001; Simon Marlow; Simon L. Peyton Jones; Maurice Herlihy (Commun. ACM, 2008)

Transactions are back—but are they the same?: "Le Retour de Martin Guerre" (Sommersby). - Pascal Felber; Christof Fetzer; Rachid Guerraoui; Tim Harris 001 (SIGACT News, 2008)

Implementation and Use of Transactional Memory with Dynamic Separation. - Martín Abadi; Andrew Birrell; Tim Harris 001; Johnson Hsieh; Michael Isard (CC, 2009)

Perspectives on Transactional Memory. - Martín Abadi; Tim Harris 001 (CONCUR, 2009)

A runtime system for software lock elision. - Amitabha Roy 002; Steven Hand 001; Tim Harris 001 (EuroSys, 2009)

QuakeTM: parallelizing a complex sequential application using transactional memory. - Vladimir Gajinov; Ferad Zyulkyarov; Osman S. Unsal; Adrián Cristal; Eduard Ayguadé; Tim Harris 001; Mateo Valero (ICS, 2009)

Taking the heat off transactions: Dynamic selection of pessimistic concurrency control. - Nehir Sönmez; Tim Harris 001; Adrián Cristal; Osman S. Unsal; Mateo Valero (IPDPS, 2009)

EazyHTM: eager-lazy hardware transactional memory. - Sasa Tomic; Cristian Perfumo; Chinmay Eishan Kulkarni; Adrià Armejach; Adrián Cristal; Osman S. Unsal; Tim Harris 001; Mateo Valero (MICRO, 2009)

Language constructs for transactional memory. - Tim Harris 001 (POPL, 2009)

Transactional memory with strong atomicity using off-the-shelf memory protection hardware. - Martín Abadi; Tim Harris 001; Mojtaba Mehrara (PPoPP, 2009)

Atomic quake: using transactional memory in an interactive multiplayer game server. - Ferad Zyulkyarov; Vladimir Gajinov; Osman S. Unsal; Adrián Cristal; Eduard Ayguadé; Tim Harris 001; Mateo Valero (PPoPP, 2009)

The multikernel: a new OS architecture for scalable multicore systems. - Andrew Baumann; Paul Barham 001; Pierre-Évariste Dagand; Tim Harris 001; Rebecca Isaacs; Simon Peter 001; Timothy Roscoe; Adrian Schüpbach; Akhilesh Singhania (SOSP, 2009)

A lightweight in-place implementation for software thread-level speculation. - Cosmin E. Oancea; Alan Mycroft; Tim Harris 001 (SPAA, 2009)

Discovering and understanding performance bottlenecks in transactional applications. - Ferad Zyulkyarov; Srdjan Stipic; Tim Harris 001; Osman S. Unsal; Adrián Cristal; Ibrahim Hur; Mateo Valero (PACT, 2010)

Dynamic filtering: multi-purpose architecture support for language runtime systems. - Tim Harris 001; Sasa Tomic; Adrián Cristal; Osman S. Unsal (ASPLOS, 2010)

Architectural Support for Fair Reader-Writer Locking. - Enrique Vallejo 001; Ramón Beivide; Adrián Cristal; Tim Harris 001; Fernando Vallejo; Osman S. Unsal; Mateo Valero (MICRO, 2010)

Debugging programs that use atomic blocks and transactional memory. - Ferad Zyulkyarov; Tim Harris 001; Osman S. Unsal; Adrián Cristal; Mateo Valero (PPoPP, 2010)

A model of dynamic separation for transactional memory. - Martín Abadi; Tim Harris 001; Katherine F. Moore (Inf. Comput., 2010)

Transactional Memory, 2nd Edition - Tim Harris 001; James R. Larus; Ravi Rajwar (Transactional Memory (2.Ed.), 2010)

STM2: A Parallel STM for High Performance Simultaneous Multithreading Systems. - Gokcen Kestor; Roberto Gioiosa; Tim Harris 001; Osman S. Unsal; Adrián Cristal; Ibrahim Hur; Mateo Valero (PACT, 2011)

AC: composable asynchronous IO for native languages. - Tim Harris 001; Martín Abadi; Rebecca Isaacs; Ross McIlroy (OOPSLA, 2011)

Weak atomicity under the x86 memory consistency model. - Amitabha Roy 002; Steven Hand 001; Tim Harris 001 (PPoPP, 2011)

Hybrid binary rewriting for memory access instrumentation. - Amitabha Roy 002; Steven Hand 001; Tim Harris 001 (VEE, 2011)

Hybrid Transactional Memory with Pessimistic Concurrency Control. - Enrique Vallejo 001; Sutirtha Sanyal; Tim Harris 001; Fernando Vallejo; Ramón Beivide; Osman S. Unsal; Adrián Cristal; Mateo Valero (Int. J. Parallel Program., 2011)

Semantics of transactional memory and automatic mutual exclusion. - Martín Abadi; Andrew Birrell; Tim Harris 001; Michael Isard (ACM Trans. Program. Lang. Syst., 2011)

Transactional Memory. - Tim Harris 001 (Fundamentals of Multicore Software Development, 2012)

Supporting stateful tasks in a dataflow graph. - Vladimir Gajinov; Srdjan Stipic; Osman S. Unsal; Tim Harris 001; Eduard Ayguadé; Adrián Cristal (PACT, 2012)

Lock Inference in the Presence of Large Libraries. - Khilan Gudka; Tim Harris 001; Susan Eisenbach (ECOOP, 2012)

STM in the small: trading generality for performance in software transactional memory. - Aleksandar Dragojevic; Tim Harris 001 (EuroSys, 2012)

Integrating Dataflow Abstractions into the Shared Memory Model. - Vladimir Gajinov; Srdjan Stipic; Osman S. Unsal; Tim Harris 001; Eduard Ayguadé; Adrián Cristal (SBAC-PAD, 2012)

Programming with SpecTM. - Tim Harris 001; Aleksandar Dragojevic (Bull. EATCS, 2012)

Profiling and Optimizing Transactional Memory Applications. - Ferad Zyulkyarov; Srdjan Stipic; Tim Harris 001; Osman S. Unsal; Adrián Cristal; Ibrahim Hur; Mateo Valero (Int. J. Parallel Program., 2012)

Weak atomicity for the x86 memory consistency model. - Amitabha Roy 002; Steven Hand 001; Tim Harris 001 (J. Parallel Distributed Comput., 2012)

Hardware transactional memory with software-defined conflicts. - J. Rubén Titos Gil; Manuel E. Acacio; José M. García 001; Tim Harris 001; Adrián Cristal; Osman S. Unsal; Ibrahim Hur; Mateo Valero (ACM Trans. Archit. Code Optim., 2012)

HARP: Adaptive abort recurrence prediction for Hardware Transactional Memory. - Adrià Armejach; Anurag Negi; Adrián Cristal; Osman S. Unsal; Per Stenström; Tim Harris 001 (HiPC, 2013)

Constrained Data-Driven Parallelism. - Tim Harris 001; Yossi Lev; Victor Luchangco; Virendra J. Marathe; Mark Moir (HotPar, 2013)

TM-dietlibc: A TM-aware Real-World System Library. - Vesna Smiljkovic; Martin Nowack; Neboja Miletic; Tim Harris 001; Osman S. Ünsal; Adrián Cristal; Mateo Valero (IPDPS, 2013)

Message Passing or Shared Memory: Evaluating the Delegation Abstraction for Multicores. - Irina Calciu; Dave Dice; Tim Harris 001; Maurice Herlihy; Alex Kogan; Virendra J. Marathe; Mark Moir (OPODIS, 2013)

Callisto: co-scheduling parallel runtime systems. - Tim Harris 001; Martin Maas 001; Virendra J. Marathe (EuroSys, 2014)

Cosh: Clear OS Data Sharing In An Incoherent World. - Andrew Baumann; Chris Hawblitzel; Kornilios Kourtis; Tim Harris 001; Timothy Roscoe (TRIOS, 2014)

Hardware extensions to make lazy subscription safe. - Dave Dice; Timothy L. Harris; Alex Kogan; Yossi Lev; Mark Moir (CoRR, 2014)

Deployment of Query Plans on Multicores. - Jana Giceva; Gustavo Alonso; Timothy Roscoe; Tim Harris 001 (Proc. VLDB Endow., 2014)

Language support for lightweight transactions. - Tim Harris 001; Keir Fraser (ACM SIGPLAN Notices, 2014)

Trash Day: Coordinating Garbage Collection in Distributed Systems. - Martin Maas 001; Tim Harris 001; Krste Asanovic; John Kubiatowicz (HotOS, 2015)

LIRA: Adaptive Contention-Aware Thread Placement for Parallel Runtime Systems. - Alexander Collins; Tim Harris 001; Murray Cole; Christian Fensch (ROSS@HPDC, 2015)

Callisto-RTS: Fine-Grain Parallel Loops. - Tim Harris 001; Stefan Kaestle (USENIX ATC, 2015)

Shoal: Smart Allocation and Replication of Memory For Parallel Programs. - Stefan Kaestle; Reto Achermann; Timothy Roscoe; Tim Harris 001 (USENIX ATC, 2015)

The Influence of Malloc Placement on TSX Hardware Transactional Memory. - Dave Dice; Tim Harris 001; Alex Kogan; Yossi Lev (CoRR, 2015)

Rack-scale Computing (Dagstuhl Seminar 15421). - Babak Falsafi; Tim Harris 001; Dushyanth Narayanan; David A. Patterson 001 (Dagstuhl Reports, 2015)

Hardware Trends: Challenges and Opportunities in Distributed Computing. - Tim Harris 001 (SIGACT News, 2015)

Taurus: A Holistic Language Runtime System for Coordinating Distributed Managed-Language Applications. - Martin Maas 001; Krste Asanovic; Tim Harris 001; John Kubiatowicz (ASPLOS, 2016)

The End of a Myth: Distributed Transactions Can Scale. - Erfan Zamanian; Carsten Binnig; Tim Kraska; Tim Harris 001 (CoRR, 2016)

Composable scheduler activations for Haskell. - K. C. Sivaramakrishnan; Tim Harris 001; Simon Marlow; Simon Peyton Jones (J. Funct. Program., 2016)

Abstracting Multi-Core Topologies with MCTOP. - Georgios Chatzopoulos; Rachid Guerraoui; Tim Harris 001; Vasileios Trigonakis (EuroSys, 2017)

Pandia: comprehensive contention-sensitive thread placement. - Daniel Goodman; Georgios Varisteas; Tim Harris 001 (EuroSys, 2017)

Persistent Memcached: Bringing Legacy Code to Byte-Addressable Persistent Memory. - Virendra J. Marathe; Margo I. Seltzer; Steve Byan; Tim Harris 001 (HotStorage, 2017)

The End of a Myth: Distributed Transaction Can Scale. - Erfan Zamanian; Carsten Binnig; Tim Kraska; Tim Harris 001 (Proc. VLDB Endow., 2017)

Guest Editor Introduction PPoPP 2016, Special Issue 2 of 2. - Grey Ballard; Mary W. Hall; Tim Harris 001; Brandon Lucia (ACM Trans. Parallel Comput., 2017)

Analytics with smart arrays: adaptive and efficient language-independent data. - Iraklis Psaroudakis; Stefan Kaestle; Matthias Grimmer; Daniel Goodman; Jean-Pierre Lozi; Tim Harris 001 (EuroSys, 2018)

Brief Announcement: Persistent Multi-Word Compare-and-Swap. - Matej Pavlovic; Alex Kogan; Virendra J. Marathe; Tim Harris 001 (PODC, 2018)

Closing the Performance Gap Between Volatile and Persistent Key-Value Stores Using Cross-Referencing Logs. - Yihe Huang; Matej Pavlovic; Virendra J. Marathe; Margo I. Seltzer; Tim Harris 001; Steve Byan (USENIX ATC, 2018)

Technical perspective: Node replication divides to conquer. - Tim Harris 001 (Commun. ACM, 2018)

Persistent Memory Transactions. - Virendra J. Marathe; Achin Mishra; Amee Trivedi; Yihe Huang; Faisal Zaghloul; Sanidhya Kashyap; Margo I. Seltzer; Tim Harris 001; Steve Byan; Bill Bridge; Dave Dice (CoRR, 2018)

DistIR: An Intermediate Representation for Optimizing Distributed Neural Networks. - Keshav Santhanam; Siddharth Krishna 001; Ryota Tomioka; Andrew W. Fitzgibbon; Tim Harris 001 (EuroMLSys@EuroSys, 2021)

Modeling memory bandwidth patterns on NUMA machines with performance counters. - Daniel Goodman; Roni Haecki; Tim Harris 001 (CoRR, 2021)

DistIR: An Intermediate Representation and Simulator for Efficient Neural Network Distribution. - Keshav Santhanam; Siddharth Krishna 001; Ryota Tomioka; Tim Harris 001; Matei Zaharia (CoRR, 2021)

Five Ways Not To Fool Yourself: Designing Experiments for Understanding Performance. - Tim Harris 001 (SIGACT News, 2021)