A framework for fast hardware-software co-simulation. - Andreas Hoffmann 002; Tim Kogel; Heinrich Meyr (DATE, 2001)

A novel methodology for the design of application-specificinstruction-set processors (ASIPs) using a machine description language. - Andreas Hoffmann 002; Tim Kogel; Achim Nohl; Gunnar Braun; Oliver Schliebusch; Oliver Wahlen; Andreas Wieferink; Heinrich Meyr (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2001)

Generic Tool-Set for SoC Mulitiprocessor Debugging and Synchronization. - Andreas Wieferink; Tim Kogel; Achim Nohl; Andreas Hoffmann 002 (ASAP, 2003)

A modular simulation framework for architectural exploration of on-chip interconnection networks. - Tim Kogel; Malte Doerper; Andreas Wieferink; Rainer Leupers; Gerd Ascheid; Heinrich Meyr; Serge Goossens (CODES+ISSS, 2003)

A highly efficient modeling style for heterogeneous bus architectures. - Manoj Ariyamparambath; Denis Bussaglia; Bernd Reinkemeier; Tim Kogel; Torsten Kempf (SoC, 2003)

Heterogeneous MP-SoC: the solution to energy-efficient signal processing. - Tim Kogel; Heinrich Meyr (DAC, 2004)

A Methodology and Tool Suite for C Compiler Generation from ADL Processor Models. - Manuel Hohenauer; Hanno Scharwächter; Kingshuk Karuri; Oliver Wahlen; Tim Kogel; Rainer Leupers; Gerd Ascheid; Heinrich Meyr; Gunnar Braun; Hans van Someren 001 (DATE, 2004)

A System Level Processor/Communication Co-Exploration Methodology for Multi-Processor System-on-Chip Platform. - Andreas Wieferink; Tim Kogel; Rainer Leupers; Gerd Ascheid; Heinrich Meyr; Gunnar Braun; Achim Nohl (DATE, 2004)

Virtual Architecture Mapping: A SystemC Based Methodology for Architectural Exploration of System-on-Chip Designs. - Tim Kogel; Malte Doerper; Torsten Kempf; Andreas Wieferink; Rainer Leupers; Gerd Ascheid; Heinrich Meyr (SAMOS, 2004)

Early ISS Integration into Network-on-Chip Designs. - Andreas Wieferink; Malte Doerper; Tim Kogel; Rainer Leupers; Gerd Ascheid; Heinrich Meyr (SAMOS, 2004)

A framework for automated and optimized ASIP implementation supporting multiple hardware description languages. - Oliver Schliebusch; Anupam Chattopadhyay; David Kammler; Gerd Ascheid; Rainer Leupers; Heinrich Meyr; Tim Kogel (ASP-DAC, 2005)

Retargetable generation of TLM bus interfaces for MP-SoC platforms. - Andreas Wieferink; Rainer Leupers; Gerd Ascheid; Heinrich Meyr; Tom Michiels; Achim Nohl; Tim Kogel (CODES+ISSS, 2005)

A Modular Simulation Framework for Spatial and Temporal Task Mapping onto Multi-Processor SoC Platforms. - Torsten Kempf; Malte Doerper; Rainer Leupers; Gerd Ascheid; Heinrich Meyr; Tim Kogel; Bart Vanthournout (DATE, 2005)

OCP TLM for Architectural Modelling. - Tim Kogel; Anssi Haverinen (FDL, 2005)

Integrated system-level modeling of network-on-chip enabled multi-processor platforms. - Tim Kogel; Rainer Leupers; Heinrich Meyr (Kluwer, 2006)

Virtual prototyping of embedded platforms for wireless and multimedia. - Tim Kogel; Matthew Braun (DATE, 2006)

ESL hand-off: fact or EDA fiction? - Hiroyuki Yagi; Wolfgang Roesner; Tim Kogel; Eshel Haritan; Hidekazu Tangi; Michael McNamara; Gary Smith 001; Nikil D. Dutt; Giovanni Mancini (DAC, 2008)

Heterogeneous System-level Specification Using SystemC. - Eugenio Villar; Axel Jantsch; Christoph Grimm 001; Tim Kogel (DATE, 2008)

Virtual architecture mapping: a SystemC based methodology for architectural exploration of System-on-Chips. - Tim Kogel; Malte Doerper; Torsten Kempf; Andreas Wieferink; Rainer Leupers; Heinrich Meyr (Int. J. Embed. Syst., 2008)

SoC multiprocessor debugging and synchronisation using generic dynamic-connect debugger frontends. - Andreas Wieferink; Tim Kogel; Olaf Zerres; Rainer Leupers; Heinrich Meyr (Int. J. Embed. Syst., 2008)

From milliwatts to megawatts: system level power challenge. - Ruchir Puri; Eshel Haritan; Stan Krolikoski; Jason Cong; Tim Kogel; Bradley D. McCredie; John Shen; Andrés Takach (DAC, 2009)

From ESL 2010 to ESL 2015. - Tor E. Jeremiassen; Tim Kogel; Andrés Takach; Grant Martin; Adam Donlin; Karamvir Chatha (CODES+ISSS, 2010)

Virtual platforms: Breaking new grounds. - Rainer Leupers; Grant Martin; Roman Plyaskin; Andreas Herkersdorf; Frank Schirrmeister; Tim Kogel; Martin Vaupel (DATE, 2012)

Synopsys Virtual Prototyping for Software Development and Early Architecture Analysis. - Tim Kogel (Handbook of Hardware/Software Codesign, 2017)

AMAIX: A Generic Analytical Model for Deep Learning Accelerators. - Lukas Jünger 001; Niko Zurstraßen; Tim Kogel; Holger Keding; Rainer Leupers (SAMOS, 2020)

Guest Editorial: Communication-Aware Designs and Methodologies for Reliable and Adaptable On-Chip AI SubSystems and Accelerators. - Kun-Chih Chen; Masoumeh Ebrahimi; Maurizio Palesi; Tim Kogel (IEEE J. Emerg. Sel. Topics Circuits Syst., 2020)

An Overview of Efficient Interconnection Networks for Deep Neural Network Accelerators. - Seyed Morteza Nabavinejad; Mohammad Baharloo; Kun-Chih Chen; Maurizio Palesi; Tim Kogel; Masoumeh Ebrahimi (IEEE J. Emerg. Sel. Topics Circuits Syst., 2020)

AMAIX In-Depth: A Generic Analytical Model for Deep Learning Accelerators. - Niko Zurstraßen; Lukas Jünger 001; Tim Kogel; Holger Keding; Rainer Leupers (Int. J. Parallel Program., 2022)