A central office combined ADSL-VDSL line driver solution in .35μm CMOS. - Tim Piessens; Michiel Steyaert (CICC, 2002)

Oscillator pulling and synchronisation issues in self-oscillating class D power amplifiers. - Tim Piessens; Michiel Steyaert (ESSCIRC, 2003)

Highly efficient xDSL line drivers in 0.35-μm CMOS using a self-oscillating power amplifier. - Tim Piessens; Michiel Steyaert (IEEE J. Solid State Circuits, 2003)

A high-voltage output driver in a 2.5-V 0.25-μm CMOS technology. - Bert Serneels; Tim Piessens; Michiel Steyaert; Wim Dehaene (IEEE J. Solid State Circuits, 2005)

Behavioral analysis of self-oscillating class D line drivers. - Tim Piessens; Michiel Steyaert (IEEE Trans. Circuits Syst. I Regul. Pap., 2005)

Nanosecond Delay Floating High Voltage Level Shifters in a 0.35 μ m HV-CMOS Technology. - Yashodhan Moghe; Torsten Lehmann; Tim Piessens (IEEE J. Solid State Circuits, 2011)

A 1.5W 10V-output Class-D amplifier using a boosted supply from a single 3.3V input in standard 1.8V/3.3V 0.18μm CMOS. - Bert Serneels; Eldert Geukens; Bram De Muer; Tim Piessens (ISSCC, 2012)

Session 5 overview: Analog techniques. - Marco Berkhout; Tim Piessens (ISSCC, 2016)

16.5 A flexible thin-film pixel array with a charge-to-current gain of 59µA/pC and 0.33% nonlinearity and a cost effective readout circuit for large-area X-ray imaging. - Florian De Roose; Kris Myny; Soeren Steudel; Myriam Willigems; Steve Smout; Tim Piessens; Jan Genoe; Wim Dehaene (ISSCC, 2016)

Session 5 overview: Analog techniques. - Tim Piessens; Vadim Ivanov; Axel Thomsen (ISSCC, 2017)

Introduction to the Special Issue on the 2017 IEEE International Solid-State Circuits Conference. - Tim Piessens; Seung-Tak Ryu; Chih-Ming Hung; Alyosha C. Molnar; Mounir Meghelli (IEEE J. Solid State Circuits, 2017)