The test and debug features of the AMD-K7 microprocessor. - Timothy J. Wood (ITC, 1999)

A seventh-generation x86 microprocessor. - Michael Golden; Steve Hesley; Alisa Scherer; Matthew Crowley; Scott C. Johnson; Stephan Meier; Dirk Meyer; Jerry D. Moench; Stuart F. Oberman; Hamid Partovi; Fred Weber; Scott White; et al. (IEEE J. Solid State Circuits, 1999)

Conversion of small functional test sets of nonscan blocks to scan patterns. - Don E. Ross; Tim Wood 001; Grady Giles (ITC, 2000)

Position statement: "have we overcome the challenges associated with SoC and multi-core testing?". - Tim Wood 001 (ITC, 2005)

Platform Independent Test Access Port Architecture. - Arie Margulis; David Akselrod; Tim Wood 001; Sopho Metsis (ITC, 2008)

The Test Features of the Quad-Core AMD Opteron- Microprocessor. - Tim Wood 001; Grady Giles; Chris Kiszely; Martin Schuessler; Daniela Toneva; Joel Irby; Michael Mateja (ITC, 2008)

Toward more efficient scan data bandwidth utilization on modern SOCs. - Yan Dong; Grady Giles; GuoLiang Li; Jeff Rearick; John Schulze; James Wingfield; Tim Wood 001 (SoCC, 2016)

Maximizing scan pin and bandwidth utilization with a scan routing fabric. - Yan Dong; Grady Giles; GuoLiang Li; Jeff Rearick; John Schulze; James Wingfield; Tim Wood 001 (ITC, 2017)