Timo Hämäläinen

According to our database1, Timo Hämäläinen authored at least 225 papers between 1995 and 2018.

Collaborative distances :
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2018
Low Latency Edge Rendering Scheme for Interactive 360 Degree Virtual Reality Gaming.
Proceedings of the 38th IEEE International Conference on Distributed Computing Systems, 2018

Rate-Distortion-Complexity Optimized Coding Scheme for Kvazaar HEVC Intra Encoder.
Proceedings of the 2018 Data Compression Conference, 2018

2017
The Effect of Hardware-Computed Travel Time on Localization Accuracy in the Inversion of Experimental (Acoustic) Waveform Data.
IEEE Trans. Computational Imaging, 2017

Kvazaar 4K HEVC intra encoder on FPGA accelerated airframe server.
Proceedings of the 2017 IEEE International Workshop on Signal Processing Systems, 2017

Kvazaar: HEVC/H.265 4K30p Intra Encoder.
Proceedings of the 19th IEEE International Symposium on Multimedia, 2017

Kvazzup: Open Software for HEVC Video Calls.
Proceedings of the 19th IEEE International Symposium on Multimedia, 2017

High-level synthesized 2-D IDCT/IDST implementation for HEVC codecs on FPGA.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017

Complexity based test cases for log file analyzers.
Proceedings of the 15th IEEE International Conference on Industrial Informatics, 2017

High-level synthesis implementation of HEVC 2-D DCT/DST on FPGA.
Proceedings of the 2017 IEEE International Conference on Acoustics, 2017

Analysis and Visualization of Product Memory Layout in IP-XACT.
Proceedings of the Euromicro Conference on Digital System Design, 2017

2016
PROMOTE: A Process Mining Tool for Embedded System Development.
Proceedings of the Product-Focused Software Process Improvement, 2016

Log File Analyzing in Intelligent Transportation Systems Development.
Proceedings of the Product-Focused Software Process Improvement, 2016

Distributed systemc simulation on manycore servers.
Proceedings of the IEEE Nordic Circuits and Systems Conference, 2016

Kvazaar: Open-Source HEVC/H.265 Encoder.
Proceedings of the 2016 ACM Conference on Multimedia Conference, 2016

RTP/RTCP Reception Hint Tracks for Video Call Recording and Playback.
Proceedings of the IEEE International Symposium on Multimedia, 2016

Live demonstration: Run-time visualization of Kvazaar HEVC intra encoder.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016

Designing a clock cycle accurate application with high-level synthesis.
Proceedings of the IECON 2016, 2016

Behavior Mining Language for mining expected behavior from log files.
Proceedings of the IECON 2016, 2016

AVX2-optimized Kvazaar HEVC intra encoder.
Proceedings of the 2016 IEEE International Conference on Image Processing, 2016

The structure of robust controllers for distributed parameter systems.
Proceedings of the 2016 European Control Conference, 2016

2015
Kvazaar HEVC still image coding on Raspberry Pi 2 for low-cost remote surveillance.
Proceedings of the 2015 Visual Communications and Image Processing, 2015

Semantics analyzing expression editors in IP-XACT design tool Kactus2.
Proceedings of the 14th Symposium on Programming Languages and Software Tools (SPLST'15), 2015

LOGDIG log file analyzer for mining expected behavior from log files.
Proceedings of the 14th Symposium on Programming Languages and Software Tools (SPLST'15), 2015

Parallelization of Kvazaar HEVC intra encoder for multi-core processors.
Proceedings of the 2015 IEEE Workshop on Signal Processing Systems, 2015

Kvazaar HEVC encoder for efficient intra coding.
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015

Performance evaluation of Kvazaar HEVC intra encoder on Xeon Phi many-core processor.
Proceedings of the 2015 IEEE Global Conference on Signal and Information Processing, 2015

High-Level Synthesis Design Flow for HEVC Intra Encoder on SoC-FPGA.
Proceedings of the 2015 Euromicro Conference on Digital System Design, 2015

2014
Efficient Mode Decision Schemes for HEVC Inter Prediction.
IEEE Trans. Circuits Syst. Video Techn., 2014

Comparative study of 8 and 10-bit HEVC encoders.
Proceedings of the 2014 IEEE Visual Communications and Image Processing Conference, 2014

Implementation of Multicore communications API.
Proceedings of the 2014 International Symposium on System-on-Chip, 2014

WOKE: A novel workflow model editor.
Proceedings of the 2014 International Symposium on System-on-Chip, 2014

Gamification of System-on-Chip design.
Proceedings of the 2014 International Symposium on System-on-Chip, 2014

2013
Low-Power Wireless Sensor Network Platforms.
Proceedings of the Handbook of Signal Processing Systems, 2013

A scalable, non-interfering, synthesizable Network-on-Chip monitor - Extended version.
Microprocessors and Microsystems - Embedded Hardware Design, 2013

Recommendations for using Simulated Annealing in task mapping.
Design Autom. for Emb. Sys., 2013

Dependency analysis and visualization tool for Kactus2 IP-XACT design framework.
Proceedings of the 2013 International Symposium on System on Chip, 2013

Framework for industrial embedded system product development and management.
Proceedings of the 2013 International Symposium on System on Chip, 2013

Extending IP-XACT to embedded system HW/SW integration.
Proceedings of the 2013 International Symposium on System on Chip, 2013

2012
Low-Power Wireless Sensor Networks - Protocols, Services and Applications
Springer Briefs in Electrical and Computer Engineering, Springer, ISBN: 978-1-4614-2173-3, 2012

Comparative Rate-Distortion-Complexity Analysis of HEVC and AVC Video Codecs.
IEEE Trans. Circuits Syst. Video Techn., 2012

MARTE profile extension for modeling dynamic power management of embedded systems.
Journal of Systems Architecture - Embedded Systems Design, 2012

System-on-Chip deployment with MCAPI abstraction and IP-XACT metadata.
Proceedings of the 2012 International Conference on Embedded Computer Systems: Architectures, 2012

Integration of TTA processor tools to Kactus2 IP-XACT design flow.
Proceedings of the NORCHIP 2012, Copenhagen, Denmark, November 12-13, 2012, 2012

Complexity analysis of next-generation HEVC decoder.
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012

Robust regulation of distributed parameter systems with infinite-dimensional exosystems.
Proceedings of the 51th IEEE Conference on Decision and Control, 2012

2011
Generic software framework for a line-buffer-based image processing pipeline.
IEEE Trans. Consumer Electronics, 2011

A Self-Tuning Robust Regulator for Infinite-Dimensional Systems.
IEEE Trans. Automat. Contr., 2011

Design and Implementation of a Firmware Update Protocol for Resource Constrained Wireless Sensor Networks.
IJERTCS, 2011

A Wireless Sensor Network for Hospital Security: From User Requirements to Pilot Deployment.
EURASIP J. Wireless Comm. and Networking, 2011

Meta-Model and UML Profile for Requirements Management of Software and Embedded Systems.
EURASIP J. Emb. Sys., 2011

Remote diagnostics and performance analysis for a wireless sensor network.
Proceedings of the IEEE Workshop on Signal Processing Systems, 2011

Multicore Communications API (MCAPI) implementation on an FPGA multiprocessor.
Proceedings of the 2011 International Conference on Embedded Computer Systems: Architectures, 2011

Applying IP-XACT in product data management.
Proceedings of the 2011 International Symposium on System on Chip, 2011

A set of traffic models for Network-on-Chip benchmarking.
Proceedings of the 2011 International Symposium on System on Chip, 2011

Link Quality-Based Channel Selection for Resource Constrained WSNs.
Proceedings of the Advances in Grid and Pervasive Computing - 6th International Conference, 2011

Kactus2: Environment for Embedded Product Development Using IP-XACT and MCAPI.
Proceedings of the 14th Euromicro Conference on Digital System Design, 2011

Pilot studies of wireless sensor networks: Practical experiences.
Proceedings of the 2011 Conference on Design and Architectures for Signal and Image Processing, 2011

Range-free algorithm for energy-efficient indoor localization in Wireless Sensor Networks.
Proceedings of the 2011 Conference on Design and Architectures for Signal and Image Processing, 2011

Practical monitoring and analysis tool for WSN testing.
Proceedings of the 2011 Conference on Design and Architectures for Signal and Image Processing, 2011

2010
Robust Regulation of Distributed Parameter Systems with Infinite-Dimensional Exosystems.
SIAM J. Control and Optimization, 2010

Class of Service Support Layer for Wireless Mesh Networks.
IJCNS, 2010

Energy-Efficient Reservation-Based Medium Access Control Protocol for Wireless Sensor Networks.
EURASIP J. Wireless Comm. and Networking, 2010

Positioning in resource-constrained ultra low-power Wireless Sensor Networks.
Proceedings of the Ubiquitous Positioning Indoor Navigation and Location Based Service, 2010

Low-power Wireless Sensor Network Platforms.
Proceedings of the Handbook of Signal Processing Systems, 2010

2009
Evaluating SoC Network Performance in MPEG-4 Encoder.
Signal Processing Systems, 2009

A Configurable Motion Estimation Architecture for Block-Matching Algorithms.
IEEE Trans. Circuits Syst. Video Techn., 2009

Availability and End-to-end Reliability in Low Duty Cycle MultihopWireless Sensor Networks.
Sensors, 2009

Application modelling and hardware description for network-on-chip benchmarking.
IET Computers & Digital Techniques, 2009

Performance Evaluation of UML2-Modeled Embedded Streaming Applications with System-Level Simulation.
EURASIP J. Emb. Sys., 2009

Energy-efficient neighbor discovery protocol for mobile wireless sensor networks.
Ad Hoc Networks, 2009

HybridKernel: Preemptive kernel with event-driven extension for resource constrained wireless sensor networks.
Proceedings of the IEEE Workshop on Signal Processing Systems, 2009

Robust tree construction and maintenance for global time synchronization protocols in Wireless Sensor Networks.
Proceedings of the IEEE Workshop on Signal Processing Systems, 2009

Evaluating UML2 modeling of IP-XACT objects for automatic MP-SoC integration onto FPGA.
Proceedings of the Design, Automation and Test in Europe, 2009

2008
Configurable Data Memory for Multimedia Processing.
Signal Processing Systems, 2008

A Parallel Memory System for Variable Block-Size Motion Estimation Algorithms.
IEEE Trans. Circuits Syst. Video Techn., 2008

Evaluating the model accuracy in automated design space exploration.
Microprocessors and Microsystems - Embedded Hardware Design, 2008

Editorial.
Journal of Systems Architecture - Embedded Systems Design, 2008

Performance model for IEEE 802.11s wireless mesh network deployment design.
J. Parallel Distrib. Comput., 2008

Distributed bus arbitration algorithm comparison on FPGA-based MPEG-4 multiprocessor system on chip.
IET Computers & Digital Techniques, 2008

Network Signaling Channel for Improving ZigBee Performance in Dynamic Cluster-Tree Networks.
EURASIP J. Wireless Comm. and Networking, 2008

A Wireless Sensor Network for RF-Based Indoor Localization.
EURASIP J. Adv. Sig. Proc., 2008

Rapid design and evaluation framework for wireless sensor networks.
Ad Hoc Networks, 2008

Embedded Software Architecture for Diagnosing Network and Node Failures in Wireless Sensor Networks.
Proceedings of the Embedded Computer Systems: Architectures, 2008

Application Server for Wireless Sensor Networks.
Proceedings of the Embedded Computer Systems: Architectures, 2008

2007
Configurable implementation of parallel memory based real-time video downscaler.
Microprocessors and Microsystems, 2007

Editorial.
Journal of Systems Architecture, 2007

Benchmarking mesh and hierarchical bus networks in system-on-chip context.
Journal of Systems Architecture, 2007

Automated memory-aware application distribution for Multi-processor System-on-Chips.
Journal of Systems Architecture, 2007

Editorial.
Journal of Systems Architecture, 2007

Implementing a WLAN Video Terminal Using UML and Fully Automated Design Flow.
EURASIP J. Emb. Sys., 2007

Evaluation of throughput estimation models and algorithms for WLAN frequency planning.
Computer Networks, 2007

Compact modular exponentiation accelerator for modern FPGA devices.
Computers & Electrical Engineering, 2007

Tool-Aided Design and Implementation of Indoor Surveillance Wireless Sensor Network.
Proceedings of the Embedded Computer Systems: Architectures, 2007

SensorOS: A New Operating System for Time Critical WSN Applications.
Proceedings of the Embedded Computer Systems: Architectures, 2007

Evaluating Large System-on-Chip on Multi-FPGA Platform.
Proceedings of the Embedded Computer Systems: Architectures, 2007

Review of Hardware Architectures for Advanced Encryption Standard Implementations Considering Wireless Sensor Networks.
Proceedings of the Embedded Computer Systems: Architectures, 2007

Modeling Embedded Software Platforms with a UML Profile.
Proceedings of the Forum on specification and Design Languages, 2007

On network-on-chip comparison.
Proceedings of the Tenth Euromicro Conference on Digital System Design: Architectures, 2007

Evaluating the Model Accuracy in Automated Design Space Exploration.
Proceedings of the Tenth Euromicro Conference on Digital System Design: Architectures, 2007

IP Integration Overhead Analysis in System-on-Chip Video Encoder.
Proceedings of the 10th IEEE Workshop on Design & Diagnostics of Electronic Circuits & Systems (DDECS 2007), 2007

Instruction Memory Architecture Evaluation on Multiprocessor FPGA MPEG-4 Encoder.
Proceedings of the 10th IEEE Workshop on Design & Diagnostics of Electronic Circuits & Systems (DDECS 2007), 2007

Cost-aware capacity optimization in dynamic multi-hop WSNs.
Proceedings of the 2007 Design, Automation and Test in Europe Conference and Exposition, 2007

Compact hardware design of Whirlpool hashing core.
Proceedings of the 2007 Design, Automation and Test in Europe Conference and Exposition, 2007

2006
HIBI Communication Network for System-on-Chip.
VLSI Signal Processing, 2006

Scalable Architecture for SoC Video Encoders.
VLSI Signal Processing, 2006

UML-based multiprocessor SoC design framework.
ACM Trans. Embedded Comput. Syst., 2006

A High-Performance Sum of Absolute Difference Implementation for Motion Estimation.
IEEE Trans. Circuits Syst. Video Techn., 2006

Asymptotically H2 -Optimal Tuning of Low Gain Robust Controllers for DPS.
IEEE Trans. Automat. Contr., 2006

Scalable MPEG-4 Encoder on FPGA Multiprocessor SOC.
EURASIP J. Emb. Sys., 2006

Design and implementation of real-time betting system with offline terminals.
Electronic Commerce Research and Applications, 2006

Evaluating SoC Network Performance in MPEG-4 Encoder.
Proceedings of the IEEE Workshop on Signal Processing Systems, 2006

Design, Implementation, and Experiments on Outdoor Deployment of Wireless Sensor Network for Environmental Monitoring.
Proceedings of the Embedded Computer Systems: Architectures, 2006

Automated Distribution of UML 2.0 Designed Applications to a Configurable Multiprocessor Platform.
Proceedings of the Embedded Computer Systems: Architectures, 2006

Security in Wireless Sensor Networks: Considerations and Experiments.
Proceedings of the Embedded Computer Systems: Architectures, 2006

Parallel Memory Implementation for Arbitrary Stride Accesses.
Proceedings of 2006 International Conference on Embedded Computer Systems: Architectures, 2006

Evaluation of throughput estimation models and algorithms for WLAN frequency planning.
Proceedings of the 3rd International ICST Conference on Quality of Service in Heterogeneous Wired/Wireless Networks, 2006

Cost-Aware Dynamic Routing Protocol for Wireless Sensor Networks - Design and Prototype Experiments.
Proceedings of the IEEE 17th International Symposium on Personal, 2006

Experimenting TCP/IP for Low-Power Wireless Sensor Networks.
Proceedings of the IEEE 17th International Symposium on Personal, 2006

Configurable Protocol Engine for Runtime-Configurable Communication Subsystems on Multiprocessor SoC.
Proceedings of the IEEE 17th International Symposium on Personal, 2006

Transmission Power Based Path Loss Metering for Wireless Sensor Networks.
Proceedings of the IEEE 17th International Symposium on Personal, 2006

WSN API: Application Programming Interface for Wireless Sensor Networks.
Proceedings of the IEEE 17th International Symposium on Personal, 2006

Performance analysis of IEEE 802.15.4 and ZigBee for large-scale wireless sensor network applications.
Proceedings of the 3rd ACM International Workshop on Performance Evaluation of Wireless Ad Hoc, 2006

High-performance multi-radio WSN platform.
Proceedings of the 2nd international workshop on Multi-hop ad hoc networks: from theory to reality, 2006

Reliable GALS Implementation of MPEG-4 Encoder with Mixed Clock FIFO on Standard FPGA.
Proceedings of the 2006 International Conference on Field Programmable Logic and Applications (FPL), 2006

Comparison of GALS and Synchronous Architectures with MPEG-4 Video Encoder on Multiprocessor System-on-Chip FPGA.
Proceedings of the Ninth Euromicro Conference on Digital System Design: Architectures, Methods and Tools (DSD 2006), 30 August, 2006

Design and Implementation of Low-Area and Low-Power AES Encryption Hardware Core.
Proceedings of the Ninth Euromicro Conference on Digital System Design: Architectures, Methods and Tools (DSD 2006), 30 August, 2006

Impact of Shared Instruction Memory on Performance of FPGA-based MP-SoC Video Encoder.
Proceedings of the 9th IEEE Workshop on Design & Diagnostics of Electronic Circuits & Systems (DDECS 2006), 2006

Parallel Memory Architecture for Arbitrary Stride Accesses.
Proceedings of the 9th IEEE Workshop on Design & Diagnostics of Electronic Circuits & Systems (DDECS 2006), 2006

Configurable multiprocessor platform with RTOS for distributed execution of UML 2.0 designed applications.
Proceedings of the Conference on Design, Automation and Test in Europe, 2006

2005
Comments on "Winscale: an image-scaling algorithm using an area pixel Model".
IEEE Trans. Circuits Syst. Video Techn., 2005

Block-level parallel processing for scaling evenly divisible images.
IEEE Trans. on Circuits and Systems, 2005

On the realization of periodic functions.
Systems & Control Letters, 2005

Experimental parallel implementation of a wavelet-based still image encoder.
Microprocessors and Microsystems, 2005

A Survey of Application Distribution in Wireless Sensor Networks.
EURASIP J. Wireless Comm. and Networking, 2005

Benchmarking Mesh and Hierarchical Bus Networks in System-on-Chip Context.
Proceedings of the Embedded Computer Systems: Architectures, 2005

High Abstraction Level Design and Implementation Framework for Wireless Sensor Networks.
Proceedings of the Embedded Computer Systems: Architectures, 2005

Design and Implementation of a WLAN Terminal Using UML 2.0 Based Design Flow.
Proceedings of the Embedded Computer Systems: Architectures, 2005

Multihop IEEE 802.11b WLAN Performance for VoIP.
Proceedings of the IEEE 16th International Symposium on Personal, 2005

A middleware for task allocation in wireless sensor networks.
Proceedings of the IEEE 16th International Symposium on Personal, 2005

Energy optimized beacon transmission rate in a wireless sensor network.
Proceedings of the IEEE 16th International Symposium on Personal, 2005

Ultra low energy wireless temperature sensor network implementation.
Proceedings of the IEEE 16th International Symposium on Personal, 2005

Frequency management tool for multi-cell WLAN performance optimization.
Proceedings of the 14th IEEE Workshop on Local and Metropolitan Area Networks, 2005

Software and hardware prototypes of the IEEE 1588 precision time protocol on wireless LAN.
Proceedings of the 14th IEEE Workshop on Local and Metropolitan Area Networks, 2005

HIBI-based multiprocessor SoC on FPGA.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

Algorithmic optimization of H.264/AVC encoder.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

Block-level parallel processing for scaling evenly divisible frames.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

A Parallel MPEG-4 Encoder for FPGA Based Multiprocessor SoC.
Proceedings of the 2005 International Conference on Field Programmable Logic and Applications (FPL), 2005

Co-simulation of Wireless Local Area Network Terminals with Protocol Software Implemented in SDL.
Proceedings of the Eighth Euromicro Symposium on Digital Systems Design (DSD 2005), 30 August, 2005

Wireless Sensor Network Implementation for Industrial Linear Position Metering.
Proceedings of the Eighth Euromicro Symposium on Digital Systems Design (DSD 2005), 30 August, 2005

Design of Transport Triggered Architecture Processors for Wireless Encryption.
Proceedings of the Eighth Euromicro Symposium on Digital Systems Design (DSD 2005), 30 August, 2005

UML 2.0 Profile for Embedded System Design.
Proceedings of the 2005 Design, 2005

2004
Address Computation in Configurable Parallel Memory Architecture.
IEICE Transactions, 2004

Comparison of Data Dependence Analysis Tests.
Proceedings of the Computer Systems: Architectures, 2004

HIBI v.2 Communication Network for System-on-Chip.
Proceedings of the Computer Systems: Architectures, 2004

A Communication-Centric Design Flow for HIBI-Based SoCs.
Proceedings of the Computer Systems: Architectures, 2004

UML 2.0 implementation of an embedded WLAN protocol.
Proceedings of the IEEE 15th International Symposium on Personal, 2004

Design of a Manageable WLAN Access Point.
Proceedings of the Telecommunications and Networking, 2004

Precision Time Protocol Prototype on Wireless LAN.
Proceedings of the Telecommunications and Networking, 2004

Accelerating the secure remote password protocol using reconfigurable hardware.
Proceedings of the First Conference on Computing Frontiers, 2004

2003
Performance of H.26L Video Encoder on General-Purpose Processor.
VLSI Signal Processing, 2003

TUTWLAN - QoS Supporting Wireless Network.
Telecommunication Systems, 2003

Complexity of optimized H.26L video decoder implementation.
IEEE Trans. Circuits Syst. Video Techn., 2003

Comparison of video protection methods for wireless networks.
Sig. Proc.: Image Comm., 2003

Class of service control protocol for wireless LAN.
Proceedings of the IEEE 14th International Symposium on Personal, 2003

Positioning with IEEE 802.11b wireless LAN.
Proceedings of the IEEE 14th International Symposium on Personal, 2003

Implementation of a Video Transcoder for Embedded System.
Proceedings of the 2003 International Symposium on Information Technology (ITCC 2003), 2003

Experiments on Local Positioning with Bluetooth.
Proceedings of the 2003 International Symposium on Information Technology (ITCC 2003), 2003

Comparison of synthesized bus and crossbar interconnection architectures.
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003

Offline architecture for real-time betting.
Proceedings of the 2003 IEEE International Conference on Multimedia and Expo, 2003

Design of a Management System for Wireless Home Area Networking.
Proceedings of the Euro-Par 2003. Parallel Processing, 2003

Distributing SoC Simulations over a Network of Computers.
Proceedings of the 2003 Euromicro Symposium on Digital Systems Design (DSD 2003), 2003

2002
Overview of research efforts on media ISA extensions and their usage in video coding.
IEEE Trans. Circuits Syst. Video Techn., 2002

On the asymptotically optimal tuning of robust controllers for systems in the CD-algebra.
IEEE Trans. Automat. Contr., 2002

Parallel implementation of video encoder on quad DSP system.
Microprocessors and Microsystems, 2002

Interconnection scheme for continuous-media systems-on-a-chip.
Microprocessors and Microsystems, 2002

Configurable parallel memory architecture for multimedia computers.
Journal of Systems Architecture, 2002

Trends in personal wireless data communications.
Computer Communications, 2002

Video Transfer Control Protocol for a Wireless Video Demonstrator.
Proceedings of the 2002 International Symposium on Information Technology (ITCC 2002), 2002

Unified Method for Optimization of Several Video Coding Algorithms on General-Purpose Processors.
Proceedings of the 2002 International Symposium on Information Technology (ITCC 2002), 2002

Parameter optimization tool for enhancing on-chip network performance.
Proceedings of the 2002 International Symposium on Circuits and Systems, 2002

Using SDL a tool for system simulations.
Proceedings of the 2002 International Symposium on Circuits and Systems, 2002

Optimizing finite state machines for system-on-chip communication.
Proceedings of the 2002 International Symposium on Circuits and Systems, 2002

TDMA-based communication scheduling in system-on-chip video encoder.
Proceedings of the 2002 International Symposium on Circuits and Systems, 2002

Performance evaluation of Secure Remote Password protocol.
Proceedings of the 2002 International Symposium on Circuits and Systems, 2002

Enhanced Configurable Parallel Memory Architecture.
Proceedings of the 2002 Euromicro Symposium on Digital Systems Design (DSD 2002), 2002

Detecting corrupted intra macroblocks in H.263 video.
Proceedings of the IEEE 5th Workshop on Multimedia Signal Processing, 2002

2001
Architecture of a passenger information system for public transport services.
Proceedings of the 54th IEEE Vehicular Technology Conference, 2001

Interfacing multiple processors in a system-on-chip video encoder.
Proceedings of the 2001 International Symposium on Circuits and Systems, 2001

Parallel implementation of H.263 encoder for CIF-sized images on quad DSP system.
Proceedings of the 2001 International Symposium on Circuits and Systems, 2001

Implementation of encryption algorithms on transport triggered architectures.
Proceedings of the 2001 International Symposium on Circuits and Systems, 2001

Configurable hardware implementation of triple-DES encryption algorithm for wireless local area network.
Proceedings of the IEEE International Conference on Acoustics, 2001

Performance analysis of low bit rate H.26L video encoder.
Proceedings of the IEEE International Conference on Acoustics, 2001

2000
A finite-dimensional robust controller for systems in the CD-algebra.
IEEE Trans. Automat. Contr., 2000

Parallel Implementation of Self-Organizing Map on the Partial Tree Shape Neurocomputer.
Neural Processing Letters, 2000

PARNEU: general-purpose partial tree computer.
Microprocessors and Microsystems - Embedded Hardware Design, 2000

Chained backplane communication architecture for scalable multiprocessor systems.
Journal of Systems Architecture, 2000

Using SDL for Implementing a Wireless Medium Access Control Protocol.
Proceedings of the 2000 International Symposium on Multimedia Software Engineering, 2000

Real-time H.263 encoding of QCIF-images on TMS320C6201 fixed point DSP.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2000

Scalable implementation of H.263 video encoder on a parallel DSP system.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2000

Parallel DSP implementation of wavelet transform in image compression.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2000

Scalable DSP implementation of DCT-based motion estimation algorithm.
Proceedings of the 10th European Signal Processing Conference, 2000

Advanced prototype platform for a wireless multimedia local area network.
Proceedings of the 10th European Signal Processing Conference, 2000

Real-time implementation of H.263 video encoder on TMS320C6201 fixed point DSP.
Proceedings of the 10th European Signal Processing Conference, 2000

Reuseable interface in multimedia hardware environment.
Proceedings of the 10th European Signal Processing Conference, 2000

Bridging network traffic between wireless and wired lans in Windows NT.
Proceedings of the 10th European Signal Processing Conference, 2000

H.263 video encoder implementation on a scalable DSP system.
Proceedings of the 10th European Signal Processing Conference, 2000

Hardware implementation of the improved WEP and RC4 encryption algorithms for wireless terminals.
Proceedings of the 10th European Signal Processing Conference, 2000

Scalable DSP realization of wavelet transform in image coding.
Proceedings of the 10th European Signal Processing Conference, 2000

Embedding SDL implemented protocols into DSP.
Proceedings of the 2000 International Conference on Compilers, 2000

Scalable Realization of Sparse Distributed Memory on a Multiprocessor System.
Proceedings of the ISCA 9th International Conference on Intelligent Systems, 2000

1999
Field programmable gate array-based PCI interface for a coprocessor system.
Microprocessors and Microsystems - Embedded Hardware Design, 1999

Practical VHDL optimization for timing critical FPGA applications.
Microprocessors and Microsystems - Embedded Hardware Design, 1999

Windows NT Software Design and Implementation for a Wireless LAN Base Station.
Proceedings of Second ACM International Workshop on Wireless Mobile Multimedia, 1999

Unified Messaging: A Framwork Approach for Building Messaging Services.
Proceedings of the Intelligence in Networks, 1999

Software support for low latency communication in scalable multimedia DSP system.
Proceedings of the Third IEEE Workshop on Multimedia Signal Processing, 1999

Architecture for a Windows NT wireless LAN multimedia terminal.
Proceedings of the Third IEEE Workshop on Multimedia Signal Processing, 1999

Reconfiguration Mechanism for an IP Block Based Interconnection.
Proceedings of the 25th EUROMICRO '99 Conference, 1999

1997
Mapping of SOM and LVQ Algorithms on a Tree Shape Parallel Computer System.
Parallel Computing, 1997

Parallel realizations of Kanerva's sparse distributed memory on a tree-shaped computer.
Concurrency - Practice and Experience, 1997

Mapping of Radial Basis Function Networks to Partial Tree Shape Parallel Neurocomputer.
Proceedings of the Artificial Neural Networks, 1997

1996
Mapping artificial neural networks to a tree shape neurocomputer.
Microprocessors and Microsystems - Embedded Hardware Design, 1996

Accelerating genetic algorithm computation in tree shaped parallel computer.
Journal of Systems Architecture, 1996

Mapping of Multilayer Perceptron Networks to Partial Tree Shaped Parallel Neurocomputer.
Proceedings of the Artificial Neural Networks, 1996

Linearly Expandable Partial Tree Shape Architecture for Parallel Neurocomputer.
Proceedings of the Artificial Neural Networks, 1996

1995
TUTNC: a general purpose parallel computer for neural network computations.
Microprocessors and Microsystems - Embedded Hardware Design, 1995


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