Efficient floating-point texture decompression. - Tomi Aarnio; Claudio Brunelli; Timo Viitanen (SoC, 2010)

Spatter Tracking in Laser Machining. - Timo Viitanen; Jari Kolehmainen; Robert Piché; Yasuhiro Okamoto (ISVC (2), 2012)

Simplified floating-point division and square root. - Timo Viitanen; Pekka Jääskeläinen; Otto Esko; Jarmo Takala (ICASSP, 2013)

Inexpensive correctly rounded floating-point division and square root with input scaling. - Timo Viitanen; Pekka Jääskeläinen; Jarmo Takala (SiPS, 2013)

Heuristics for greedy transport triggered architecture interconnect exploration. - Timo Viitanen; Heikki Kultala; Pekka Jääskeläinen; Jarmo Takala (CASES, 2014)

Compiler optimizations for code density of variable length instructions. - Heikki Kultala; Timo Viitanen; Pekka Jääskeläinen; Janne Helkala; Jarmo Takala (SiPS, 2014)

Rapid customization of image processors using Halide. - Ville Korhonen; Pekka Jääskeläinen; Matias Koskela; Timo Viitanen; Jarmo Takala (GlobalSIP, 2015)

Power optimizations for transport triggered SIMD processors. - Joonas Multanen; Timo Viitanen; Henry Linjamaki; Heikki Kultala; Pekka Jääskeläinen; Jarmo Takala; Lauri Koskinen; Jesse Simonsson; Heikki Berg; Kalle Raiskila; Tommi Zetterman (SAMOS, 2015)

MergeTree: a HLBVH constructor for mobile systems. - Timo Viitanen; Matias Koskela; Pekka Jääskeläinen; Heikki Kultala; Jarmo Takala (SIGGRAPH Asia Technical Briefs, 2015)

Code Density and Energy Efficiency of Exposed Datapath Architectures. - Pekka Jääskeläinen; Heikki Kultala; Timo Viitanen; Jarmo Takala (J. Signal Process. Syst., 2015)

Low power design methodology for signal processing systems using lightweight dataflow techniques. - Lin Li 029; Tiziana Fanni; Timo Viitanen; Renjie Xie; Francesca Palumbo; Luigi Raffo; Heikki Huttunen; Jarmo Takala; Shuvra S. Bhattacharyya (DASIP, 2016)

Half-precision Floating-point Ray Traversal. - Matias Koskela; Timo Viitanen; Pekka Jääskeläinen; Jarmo Takala (VISIGRAPP (1: GRAPP), 2016)

Foveated Path Tracing - A Literature Review and a Performance Gain Analysis. - Matias Koskela; Timo Viitanen; Pekka Jääskeläinen; Jarmo Takala (ISVC (1), 2016)

OpenCL programmable exposed datapath high performance low-power image signal processor. - Joonas Multanen; Heikki Kultala; Matias Koskela; Timo Viitanen; Pekka Jääskeläinen; Jarmo Takala; Aram Danielyan; Cristóvão Cruz (NORCAS, 2016)

Aggressively bypassing list scheduler for transport triggered architectures. - Heikki O. Kultala; Timo Viitanen; Pekka Jääskeläinen; Jarmo Takala (SAMOS, 2016)

Multi bounding volume hierarchies for ray tracing pipelines. - Timo Viitanen; Matias Koskela; Pekka Jääskeläinen; Jarmo Takala (SIGGRAPH Asia Technical Briefs, 2016)

Xor-Masking: A Novel Statistical Method for Instruction Read Energy Reduction in Contemporary SRAM Technologies. - Joonas Multanen; Timo Viitanen; Pekka Jääskeläinen; Jarmo Takala (SiPS, 2016)

Improving Code Density with Variable Length Encoding Aware Instruction Scheduling. - Heikki Kultala; Timo Viitanen; Pekka Jääskeläinen; Janne Helkala; Jarmo Takala (J. Signal Process. Syst., 2016)

Design and implementation of a multi-mode harris corner detector architecture. - Jingui Li; Timo Viitanen; Lin Li 029; Jarmo Takala; Shuvra S. Bhattacharyya (NORCAS, 2017)

Exposed datapath optimizations for loop scheduling. - Heikki O. Kultala; Pekka Jääskeläinen; Johannes IJzerman; Lasse Lehtonen; Timo Viitanen; Markku J. Mäkitalo; Jarmo H. Takala (SAMOS, 2017)

Foveated instant preview for progressive rendering. - Matias Koskela; Kalle Immonen; Timo Viitanen; Pekka Jääskeläinen; Joonas Multanen; Jarmo Takala (SIGGRAPH Asia Technical Briefs, 2017)

Fast Hardware Construction and Refitting of Quantized Bounding Volume Hierarchies. - Timo Viitanen; Matias Koskela; Pekka Jääskeläinen; Kalle Immonen; Jarmo Takala (Comput. Graph. Forum, 2017)

Hardware design methodology using lightweight dataflow and its integration with low power techniques. - Tiziana Fanni; Lin Li 029; Timo Viitanen; Carlo Sau; Renjie Xie; Francesca Palumbo; Luigi Raffo; Heikki Huttunen; Jarmo Takala; Shuvra S. Bhattacharyya (J. Syst. Archit., 2017)

A 5.3 pJ/op approximate TTA VLIW tailored for machine learning. - Jukka Teittinen; Markus Hiienkari; Indre Zliobaite; Jaakko Hollmén; Heikki Berg; Juha Heiskala; Timo Viitanen; Jesse Simonsson; Lauri Koskinen (Microelectron. J., 2017)

MergeTree: A Fast Hardware HLBVH Constructor for Animated Ray Tracing. - Timo Viitanen; Matias Koskela; Pekka Jääskeläinen; Heikki Kultala; Jarmo Takala (ACM Trans. Graph., 2017)

Sparse Sampling for Real-time Ray Tracing. - Timo Viitanen; Matias Koskela; Kalle Immonen; Markku J. Mäkitalo; Pekka Jääskeläinen; Jarmo Takala (VISIGRAPP (1: GRAPP), 2018)

Transport-Triggered Soft Cores. - Pekka Jääskeläinen; Aleksi Tervo; Guillermo Payá Vayá; Timo Viitanen; Nicolai Behmann; Jarmo Takala; Holger Blume (IPDPS Workshops, 2018)

AivoTTA: an energy efficient programmable accelerator for CNN-based object recognition. - Jos IJzerman; Timo Viitanen; Pekka Jääskeläinen; Heikki Kultala; Lasse Lehtonen; Maurice Peemen; Henk Corporaal; Jarmo Takala (SAMOS, 2018)

LoTTA: Energy-Efficient Processor for Always-On Applications. - Joonas Multanen; Heikki Kultala; Pekka Jääskeläinen; Timo Viitanen; Aleksi Tervo; Jarmo Takala (SiPS, 2018)

Instantaneous foveated preview for progressive Monte Carlo rendering. - Matias Koskela; Kalle Immonen; Timo Viitanen; Pekka Jääskeläinen; Joonas Multanen; Jarmo H. Takala (Comput. Vis. Media, 2018)

Variable Length Instruction Compression on Transport Triggered Architectures. - Timo Viitanen; Janne Helkala; Heikki Kultala; Pekka Jääskeläinen; Jarmo Takala; Tommi Zetterman; Heikki Berg (Int. J. Parallel Program., 2018)

PLOCTree: A Fast, High-Quality Hardware BVH Builder. - Timo Viitanen; Matias Koskela; Pekka Jääskeläinen; Aleksi Tervo; Jarmo Takala (Proc. ACM Comput. Graph. Interact. Tech., 2018)

Instruction Fetch Energy Reduction with Biased SRAMs. - Joonas Multanen; Timo Viitanen; Pekka Jääskeläinen; Jarmo Takala (J. Signal Process. Syst., 2018)

Hardware Accelerators for Animated Ray Tracing. - Timo Viitanen (2018)

Foveated Real-Time Path Tracing in Visual-Polar Space. - Matias Koskela; Atro Lotvonen; Markku J. Mäkitalo; Petrus E. J. Kivi; Timo Viitanen; Pekka Jääskeläinen (EGSR (DL/I), 2019)

Are we done with ray tracing? - Alexander Keller 001; Timo Viitanen; Colin Barré-Brisebois; Christoph Schied; Morgan McGuire (SIGGRAPH Courses, 2019)

An integrated hardware/software design methodology for signal processing systems. - Lin Li 029; Carlo Sau; Tiziana Fanni; Jingui Li; Timo Viitanen; François Christophe; Francesca Palumbo; Luigi Raffo; Heikki Huttunen; Jarmo Takala; Shuvra S. Bhattacharyya (J. Syst. Archit., 2019)

Blockwise Multi-Order Feature Regression for Real-Time Path-Tracing Reconstruction. - Matias Koskela; Kalle Immonen; Markku J. Mäkitalo; Alessandro Foi; Timo Viitanen; Pekka Jääskeläinen; Heikki Kultala; Jarmo Takala (ACM Trans. Graph., 2019)

LordCore: Energy-Efficient OpenCL-Programmable Software-Defined Radio Coprocessor. - Heikki Kultala; Timo Viitanen; Heikki Berg; Pekka Jääskeläinen; Joonas Multanen; Mikko Kokkonen; Kalle Raiskila; Tommi Zetterman; Jarmo Takala (IEEE Trans. Very Large Scale Integr. Syst., 2019)

ALMARVI Execution Platform: Heterogeneous Video Processing SoC Platform on FPGA. - Joost Hoozemans; Jeroen van Straten; Timo Viitanen; Aleksi Tervo; Jiri Kadlec; Zaid Al-Ars (J. Signal Process. Syst., 2019)