A CMOS-based analog standard cell product family. - Larry D. Smith; Henry R. Farmer; Marie Kunesh; Michael A. Massetti; Dennis R. Willmott; Robert Hedman; Ray Richetta; Timothy J. Schmerbeck (IEEE J. Solid State Circuits, 1989)

A 7 Mbyte/s (65 MHz), mixed-signal, magnetic recording channel DSP using partial response signaling with maximum likelihood detection. - Rick A. Philpott; Robert A. Kertis; Ray Richetta; Timothy J. Schmerbeck; Donald J. Schulte (IEEE J. Solid State Circuits, 1994)

Cryogenic CMOS Circuits for Future Scaled Quantum Computing Systems: Challenges and Solutions. - Bodhisatwa Sadhu; Kevin Tien; Sudipto Chakraborty; David J. Frank; Pat Rosno; Daniel Moertl; Mark Yeck; John F. Bulzacchelli; Daniil Frolov; Devin Underwood; Ken Inoue; Christian W. Baks; et al. (CICC, 2025)