Architecture and methodology of a SoPC with 3.25Gbps CDR based SERDES and 1Gbps dynamic phase alignment. - Ranianand Venkata; Wilson Wong; Tina Tran; Vinson Chan; Tim Hoang; Henry Lui; Uinh Ton; Sergey Shomurryev; Chong Lee; Shoujun Waiig; Huy Ngo; Malik Kdhani; et al. (CICC, 2003)

Receiver Offset Cancellation in 90-nm PLD Integrated SERDES. - Simar Maangat; Toan Nguyen; Wilson Wong; Sergey Y. Shumarayev; Tina Tran; Tim Hoang; Richard Cliff (CICC, 2007)

TeraPHY: A Chiplet Technology for Low-Power, High-Bandwidth In-Package Optical I/O. - Mark T. Wade; Roy Meade; Chandru Ramamurthy; Michael Rust; Forrest Sedgwick; Vladimir Stojanovic; Derek Van Orden; Chong Zhang; Chen Sun 003; Sergey Y. Shumarayev; Conor O'Keeffe; Erik Anderson; et al. (IEEE Micro, 2020)