Combining Logic Minimization and Folding for PLA's. - Yu-Chin Hsu; Youn-Long Lin; Hang-Ching Hsieh; Ting-Hai Chao (IEEE Trans. Computers, 1991)

Zero Skew Clock Net Routing. - Ting-Hai Chao; Yu-Chin Hsu; Jan-Ming Ho (DAC, 1992)

Rectilinear Steiner tree construction by local and global refinement. - Ting-Hai Chao; Yu-Chin Hsu (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1994)