CP-SRAM: charge-pulsation SRAM marco for ultra-high energy-efficiency computing-in-memory. - He Zhang 011; Linjun Jiang; Jianxin Wu; Tingran Chen; Junzhan Liu; Wang Kang 001; Weisheng Zhao (DAC, 2022)

DS-CIM: A 40nm Asynchronous Dual-Spike Driven, MRAM Compute-In-Memory Macro for Spiking Neural Network. - Haotian Fu; Yulong Huang 001; Tingran Chen; Chenyi Fu; Hongwei Ren; Yue Zhou 010; Shouzhong Peng; Zhirui Zong; Biao Pan; Bojun Cheng (IEEE Trans. Circuits Syst. I Regul. Pap., 2024)

PipeCIM: A High-Throughput Computing-In-Memory Microprocessor With Nested Pipeline and RISC-V Extended Instructions. - Tingran Chen; Wenjia Wang; Jiaqi Chen; Haotian Fu; Wente Yi; Bojun Cheng; He Zhang 011; Biao Pan (IEEE Trans. Circuits Syst. I Regul. Pap., 2024)

ACSNN: A 61.25 TOPS/W, 1.65 ns delay SNN Processor that combines CIM-inspired Synapse and Asynchronous Architecture. - Tingran Chen; Yi Zhao; Yuxuan Ran; Yueting Li; Wang Kang 001; Biao Pan (ISCAS, 2025)