Real Closed Graded Fields. - Tobias Kaiser (Order, 2007)

Harmonic measure and subanalytically tame measures. - Tobias Kaiser (J. Log. Anal., 2010)

First order tameness of measures. - Tobias Kaiser (Ann. Pure Appl. Log., 2012)

R-analytic functions. - Tobias Kaiser (Arch. Math. Log., 2016)

Towards pW-Class IoT Nodes using Crystalline Oxide Semiconductor Dynamic Logic. - Tobias Kaiser; Friedel Gerfers (ISCAS, 2020)

A 18MS/s 76dB SNDR 93dB SFDR CT ΔΣ Modulator with Input Voltage Tracking 2nd-Order GmVC Filter and Shared FIR DAC in 22nm FDSOI CMOS. - Marcel Runge; Julius Edler; Tobias Kaiser; Friedel Gerfers (CICC, 2021)

A 0.9V 45MS/s CT ΔΣ Modulator with 94dB SFDR and 25.6fJ/conv. enabled by a Digital Static and ISI Calibration in 22 FDSOI CMOS. - Marcel Runge; Dario Schmock; Tobias Kaiser; Friedel Gerfers (CICC, 2021)

Pasithea-1: An Energy-Efficient Self-contained CGRA with RISC-Like ISA. - Tobias Kaiser; Friedel Gerfers (ARCS, 2022)

A 30-MHz BW 74.6-dB SNDR 92-dB SFDR CT ΔΣ Modulator with Active Body-Bias DAC Calibration in 22nm FDSOI CMOS. - Marcel Runge; Julius Edler; Dario Schmock; Tobias Kaiser; Friedel Gerfers (CICC, 2022)

A TI 12 GS/s Sampled Beam-Forming Receiver for a $2 times 2$ Antenna-Array with 69 dBc SFDR. - Enne Wittenhagen; Patrick Kurth; Tobias Kaiser; Friedel Gerfers (ICECS 2022, 2022)

A 2.41-μW/MHz, 437-PE/mm2 CGRA in 22 nm FD-SOI With RISC-Like Code Generation. - Tobias Kaiser; Friedel Gerfers (COOL CHIPS, 2023)

An 18-MS/s 76-dB SNDR Continuous-Time Δ Σ Modulator Incorporating an Input Voltage Tracking GmC Loop Filter. - Marcel Runge; Julius Edler; Tobias Kaiser; Kai Misselwitz; Friedel Gerfers (IEEE J. Solid State Circuits, 2023)

Neper-Mosaic: Seamless generation of periodic representative volume elements on unit domains. - Dilek Güzel; Tim Furlan; Tobias Kaiser; Andreas Menzel (SoftwareX, 2024)

Halfbex: A RISC-V Microarchitecture with Narrow Data Path for Improved Energy Efficiency. - Äantas Kesten; Tobias Kaiser; Jenny Lichtenstein; Christian Rudorf; Friedel Gerfers (ISCAS, 2025)

Pasithea-1: An Energy-Efficient Sequential Reconfigurable Array With CPU-Like Programmability. - Tobias Kaiser; Esther Gottschalk; Kai Biethahn; Friedel Gerfers (IEEE Open J. Circuits Syst., 2025)