Generalized Posynomial Performance Modeling. - Tom Eeckelaert; Walter Daems; Georges G. E. Gielen; Willy M. C. Sansen (DATE, 2003)

Performance space modeling for hierarchical synthesis of analog integrated circuits. - Georges G. E. Gielen; Trent McConaghy; Tom Eeckelaert (DAC, 2005)

Efficient Multiobjective Synthesis of Analog Circuits using Hierarchical Pareto-Optimal Performance Hypersurfaces. - Tom Eeckelaert; Trent McConaghy; Georges G. E. Gielen (DATE, 2005)

CAFFEINE: template-free symbolic model generation of analog circuits via canonical form functions and genetic programming. - Trent McConaghy; Tom Eeckelaert; Georges G. E. Gielen (ESSCIRC, 2005)

Hierarchical bottom–up analog optimization methodology validated by a delta-sigma A/D converter design for the 802.11a/b/g standard. - Tom Eeckelaert; Raf Schoofs; Georges G. E. Gielen; Michiel Steyaert; Willy M. C. Sansen (DAC, 2006)

A Continuous-Time Delta-Sigma Modulator for 802.11a/b/g WLAN Implemented with a Hierarchical Bottom-up Optimization Methodology. - Raf Schoofs; Tom Eeckelaert; Michiel Steyaert; Georges G. E. Gielen; Willy M. C. Sansen (ICECS, 2006)

An efficient methodology for hierarchical synthesis of mixed-signal systems with fully integrated building block topology selection. - Tom Eeckelaert; Raf Schoofs; Georges G. E. Gielen; Michiel Steyaert; Willy M. C. Sansen (DATE, 2007)

Automated synthesis of complex analog circuits. - Georges G. E. Gielen; Tom Eeckelaert; Ewout Martens; Trent McConaghy (ECCTD, 2007)

7.3 A 224Gb/s 3pJ/b 40dB Insertion Loss Transceiver in 3nm FinFET CMOS. - Dirk Pfaff; Muhammad Nummer; Noman Hai; Peter Xia; Kai Ge Yang; Mohammad-Mahdi Mohsenpour; Marc-Andre LaCroix; Babak Zamanlooy; Tom Eeckelaert; Dmitry Petrov; Mostafa Haroun; Carson R. Dick; et al. (ISSCC, 2024)

A 224Gb/s 3pJ/bit 42dB Insertion Loss Post-FEC Error Free Transceiver in 3-nm FinFET CMOS (Invited). - Dirk Pfaff; Muhammad Nummer; Noman Hai; Jingjing Xia 001; Kai Ge Yang; Mohammad-Mahdi Mohsenpour; Choon-Haw CH Leong; Marc-Andre LaCroix; Babak Zamanlooy; Tom Eeckelaert; Dmitry Petrov; Mostafa Haroun; et al. (CICC, 2025)

A 224 Gb/s 3 pJ/bit 40 dB Insertion Loss Transceiver in 3-nm FinFET CMOS. - Dirk Pfaff; Muhammad Nummer; Noman Hai; Jingjing Xia 001; Kai Ge Yang; Mohammad-Mahdi Mohsenpour; Choon-Haw C. H. Leong; Marc-Andre LaCroix; Babak Zamanlooy; Tom Eeckelaert; Dmitry Petrov; Mostafa Haroun; et al. (IEEE J. Solid State Circuits, 2025)