HotSpot: Visualizing dynamic power consumption in RTL designs. - Tom English; Ka Lok Man; Emanuel M. Popovici; Michel P. Schellekens (EWDTS, 2008)

BSAA: A Switching Activity Analysis and Visualisation Tool for SoC Power Optimisation. - Tom English; Ka Lok Man; Emanuel M. Popovici (PATMOS, 2009)

A low-power pairing-based cryptographic accelerator for embedded security applications. - Tom English; Maurice Keller; Ka Lok Man; Emanuel M. Popovici; Michel P. Schellekens; William P. Marnane (SoCC, 2009)

Delay dependent power optimisation of combinational circuits using AND-Inverter graphs. - Rashmi Mehrotra; Tom English; Emanuel M. Popovici; Michel P. Schellekens (SoCC, 2010)

Interconnect Physical Analyser (IPAA) applied to the design of scalable Network-on-Chip interconnect for Cryptographic accelerators. - Tom English; Emanuel M. Popovici (NOCS, 2011)

Timing-Driven Power Optimisation and Power-Driven Timing Optimisation of Combinational Circuits. - Rashmi Mehrotra; Tom English; Michel P. Schellekens; Steve Hollands; Emanuel M. Popovici (J. Low Power Electron., 2011)

Network-on-Chip interconnect for pairing-based cryptographic IP cores. - Tom English; Emanuel M. Popovici; Maurice Keller; William P. Marnane (J. Syst. Archit., 2011)

A Low-Latency Library in FPGA Hardware for High-Frequency Trading (HFT). - John W. Lockwood; Adwait Gupte; Nishit Mehta; Michaela Blott; Tom English; Kees A. Vissers (Hot Interconnects, 2012)