Burst List Decoding of Interleaved Reed-Solomon Codes. - Tom Kolan; Ron M. Roth (IEEE Trans. Inf. Theory, 2014)

Probabilistic bug-masking analysis for post-silicon tests in microprocessor verification. - Doowon Lee; Tom Kolan; Arkadiy Morgenshtein; Vitali Sokhin; Ronny Morad; Avi Ziv; Valeria Bertacco (DAC, 2016)

Unveiling difficult bugs in address translation caching arrays for effective post-silicon validation. - George Papadimitriou 001; Dimitris Gizopoulos; Athanasios Chatzidimitriou; Tom Kolan; Anatoly Koyfman; Ronny Morad; Vitali Sokhin (ICCD, 2016)

Post-Silicon Validation of the IBM POWER9 Processor. - Tom Kolan; Hillel Mendelson; Vitali Sokhin; Kevin Reick; Elena Tsanko; Greg Wetli (DATE, 2020)

Post Silicon Validation of the MMU. - Tom Kolan; Hillel Mendelson; Vitali Sokhin; Shai Doron; Hernan Theiler; Shay Aviv; Hagai Hadad; Natalia Freidman; Elena Tsanko; John M. Ludden; Bryant Cockcroft (DATE, 2021)