Definition and Evaluation of Access Rules in Data Management Systems. - Eduardo B. Fernández; Rita C. Summers; Tomás Lang (VLDB, 1975)

Computation of Lower Bounds for Multiprocessor Schedules. - Eduardo B. Fernández; Tomás Lang (IBM J. Res. Dev., 1975)

Scheduling as a Graph Transformation. - Eduardo B. Fernández; Tomás Lang (IBM J. Res. Dev., 1976)

Scheduling of Unit-Length Independent Tasks with Execution Constraints. - Tomás Lang; Eduardo B. Fernández (Inf. Process. Lett., 1976)

Interconnections Between Processors and Memory Modules Using the Shuffle-Exchange Network. - Tomás Lang (IEEE Trans. Computers, 1976)

A Shuffle-Exchange Network with Simplified Control. - Tomás Lang; Harold S. Stone (IEEE Trans. Computers, 1976)

A system architecture for compile-time actions in databases. - Tomás Lang; Eduardo B. Fernández; Rita C. Summers (ACM Annual Conference, 1977)

Improving the Computation of Lower Bounds for Optimal Schedules. - Tomás Lang; Eduardo B. Fernández (IBM J. Res. Dev., 1977)

Database Buffer Paging in Virtual Storage Systems. - Tomás Lang; Christopher Wood; Eduardo B. Fernández (ACM Trans. Database Syst., 1977)

Effect of Replacement Algorithms on a Paged Buffer Database System. - Eduardo B. Fernández; Tomás Lang; Christopher Wood (IBM J. Res. Dev., 1978)

Architectural Support for System Protection and Database Security. - Eduardo B. Fernández; Rita C. Summers; Tomás Lang; Charles D. Coleman (IEEE Trans. Computers, 1978)

Bandwidth of Crossbar and Multiple-Bus Connections for Multiprocessors. - Tomás Lang; Mateo Valero; Ignacio Alegre (IEEE Trans. Computers, 1982)

A performance evaluation of the multiple bus network for multiprocessor systems. - Mateo Valero; José María Llabería; Jesús Labarta; Emilio Sanvicente; Tomás Lang (SIGMETRICS, 1983)

Minimization of Demand Paging for the LRU Stack Model of Program Behavior. - Christopher Wood; Eduardo B. Fernández; Tomás Lang (Inf. Process. Lett., 1983)

Reduction of Connections for Multibus Organization. - Tomás Lang; Mateo Valero; Miguel Angel Fiol (IEEE Trans. Computers, 1983)

A division algorithm with prediction of quotient digits. - Milos D. Ercegovac; Tomás Lang (IEEE Symposium on Computer Arithmetic, 1985)

A reduced register file for RISC architectures. - Miquel Huguet; Tomás Lang (SIGARCH Comput. Archit. News, 1985)

Replication and Pipelining in Multiple-Instance Algorithms. - Jaime H. Moreno; Tomás Lang (ICPP, 1986)

Reduced register saving/restoring in single-window register files. - Tomás Lang; Miquel Huguet (SIGARCH Comput. Archit. News, 1986)

A block-and-actions generator as an alternative to a simulator for collecting architecture measurements. - Miquel Huguet; Tomás Lang; Yuval Tamir (PLDI, 1987)

On-the-Fly Conversion of Redundant into Conventional Representations. - Milos D. Ercegovac; Tomás Lang (IEEE Trans. Computers, 1987)

Implementation of fast radix-4 division with operands scaling. - Milos D. Ercegovac; Tomás Lang; Ramin Modiri (ICCD, 1988)

Nonuniform Traffic Spots in Multistage Interconnection Networks. - Tomás Lang; Lance Kurisaki (ICPP (1), 1988)

Graph-based Partitioning of Matrix Algorithms for Systolic Arrays: Application to Transitive Closure. - Jaime H. Moreno; Tomás Lang (ICPP (1), 1988)

On-Line Scheme for Computing Rotation Factors. - Milos D. Ercegovac; Tomás Lang (J. Parallel Distributed Comput., 1988)

On-the-fly rounding for division and square root. - Milos D. Ercegovac; Tomás Lang (IEEE Symposium on Computer Arithmetic, 1989)

Multistage Networks Including Traffic with Real-Time Constraints. - Lance Kurisaki; Tomás Lang (ICPP (1), 1989)

Comments on 'A systolic array for computing BA-1'. - Jaime H. Moreno; Tomás Lang (IEEE Trans. Acoust. Speech Signal Process., 1989)

Vector computations in an array computer. - Tomás Lang (1989)

A graph-based approach to map matrix algorithms onto local-access processor arrays. - Jaime H. Moreno; Tomás Lang (ASAP, 1990)

The Performance of a Faulty Multistage Interconnection Network with Diverting Switches and Correction Links. - Lance Kurisaki; Tomás Lang (ICPP (1), 1990)

An Analytical Characterization of Generalized Shuffle-Exchange Networks. - Isaac D. Scherson; Peter F. Corbett; Tomás Lang (INFOCOM, 1990)

Architectural Support for the Management of Tightly-Coupled Fine-Grain Goals in Flat Concurrent Prolog. - Leon Alkalaj; Tomás Lang; Milos D. Ercegovac (ISCA, 1990)

FCP Sequential Abstract Machine Characteristics for the Systems Development Workload. - Leon Alkalaj; Tomás Lang; Ehud Shapiro (NACLP, 1990)

Matrix Computations on Systolic-Type Meshes. - Jaime H. Moreno; Tomás Lang (Computer, 1990)

Nonuniform Traffic Spots (NUTS) in Multistage Interconnection Networks. - Tomás Lang; Lance Kurisaki (J. Parallel Distributed Comput., 1990)

Redundant and On-Line CORDIC: Application to Matrix Triangularization and SVD. - Milos D. Ercegovac; Tomás Lang (IEEE Trans. Computers, 1990)

Radix-4 Square Root Without Initial PLA. - Milos D. Ercegovac; Tomás Lang (IEEE Trans. Computers, 1990)

Simple Radix-4 Division with Opterands Scaling. - Milos D. Ercegovac; Tomás Lang (IEEE Trans. Computers, 1990)

Fast Multiplication Without Carry-Propagate Addition. - Milos D. Ercegovac; Tomás Lang (IEEE Trans. Computers, 1990)

SVD by constant-factor-redundant-CORDIC. - Jeong-A Lee; Tomás Lang (IEEE Symposium on Computer Arithmetic, 1991)

Mapping QR decomposition of a banded matrix on a ID systolic array with data contraflow and pipelined functional units. - Miguel Valero-García; Juan J. Navarro; José J. M. Liabería; Mateo Valero; Tomás Lang (Algorithms and Parallel VLSI Architectures, 1991)

A Comparison of Redundant CORDIC Rotation Engines. - John A. Harding; Tomás Lang; Jeong-A Lee (ICCD, 1991)

Module to Perform Multiplication, Division, and Square Root in Systolic Arrays for Matrix Computations. - Milos D. Ercegovac; Tomás Lang (J. Parallel Distributed Comput., 1991)

Conflict-Free Strides for Vectors in Matched Memories. - Mateo Valero; Tomás Lang; José María Llabería; Montse Peiron; Juan J. Navarro; Eduard Ayguadé (Parallel Process. Lett., 1991)

Architectural Support for Reduced Register Saving / Restoring in Single-Window Register Files. - Miquel Huguet; Tomás Lang (ACM Trans. Comput. Syst., 1991)

Linear pseudosystolic array for partitioned matrix algorithms. - Jaime H. Moreno; Miguel E. Figueroa; Tomás Lang (J. VLSI Signal Process., 1991)

MAMACG: a tool for automatic mapping of matrix algorithms onto mesh array computational graphs. - Dinh Lê; Milos D. Ercegovac; Tomás Lang; Jaime H. Moreno (ASAP, 1992)

Conflict-free access of vectors with power-of-two strides. - Mateo Valero; Tomás Lang; Eduard Ayguadé (ICS, 1992)

Increasing the Number of Strides for Conflict-Free Vector Access. - Mateo Valero; Tomás Lang; José M. Llabería; Montse Peiron; Eduard Ayguadé; Juan J. Navarro (ISCA, 1992)

Architectural Support for Goal Management in Flat Concurrent Prolog. - Leon Alkalaj; Tomás Lang; Milos D. Ercegovac (Computer, 1992)

On-the-Fly Rounding. - Milos D. Ercegovac; Tomás Lang (IEEE Trans. Computers, 1992)

Higher Radix Square Root with Prescaling. - Tomás Lang; Paolo Montuschi (IEEE Trans. Computers, 1992)

Constant-Factor Redundant CORDIC for Angle Calculation and Rotation. - Jeong-A Lee; Tomás Lang (IEEE Trans. Computers, 1992)

A method for implementation of one-dimensional systolic algorithms with data contraflow using pipelined functional units. - Miguel Valero-García; Juan J. Navarro; José María Llabería; Mateo Valero; Tomás Lang (J. VLSI Signal Process., 1992)

Division with speculation of quotient digits. - Jordi Cortadella; Tomás Lang (IEEE Symposium on Computer Arithmetic, 1993)

Very high radix division with selection by rounding and prescaling. - Milos D. Ercegovac; Tomás Lang; Paolo Montuschi (IEEE Symposium on Computer Arithmetic, 1993)

Multiplication/ division/ square root module for massively parallel computers. - Milos D. Ercegovac; Tomás Lang (Integr., 1993)

Conflict-free access to streams in multiprocessor systems. - Montse Peiron; Mateo Valero; Eduard Ayguadé; Tomás Lang (Microprocess. Microprogramming, 1993)

Introduction. - Tomás Lang; Jaime H. Moreno (J. VLSI Signal Process., 1993)

MOB forms: a class of multilevel block algorithms for dense linear algebra operations. - Juan J. Navarro; Toni Juan; Tomás Lang (International Conference on Supercomputing, 1994)

High-Radix Division and Square-Root with Speculation. - Jordi Cortadella; Tomás Lang (IEEE Trans. Computers, 1994)

Very-High Radix Division with Prescaling and Selection by Rounding. - Milos D. Ercegovac; Tomás Lang; Paolo Montuschi (IEEE Trans. Computers, 1994)

Sign detection and comparison networks with a small number of transitions. - Milos D. Ercegovac; Tomás Lang (IEEE Symposium on Computer Arithmetic, 1995)

Very-high radix combined division and square root with prescaling and selection by rounding. - Tomás Lang; Paolo Montuschi (IEEE Symposium on Computer Arithmetic, 1995)

2-D DCT using on-line arithmetic. - Javier D. Bruguera; Tomás Lang (ICASSP, 1995)

Vector Multiprocessors with Arbitrated Memory Access. - Montse Peiron; Mateo Valero; Eduard Ayguadé; Tomás Lang (ISCA, 1995)

Conflict-Free Access for Streams in Multimodule Memories. - Mateo Valero; Tomás Lang; Montse Peiron; Eduard Ayguadé (IEEE Trans. Computers, 1995)

High Radix Cordic Rotation Based on Selection by Rounding. - Elisardo Antelo; Javier D. Bruguera; Tomás Lang; Julio Villalba; Emilio L. Zapata (Euro-Par, Vol. II, 1996)

The Difference-bit Cache. - Toni Juan; Tomás Lang; Juan J. Navarro (ISCA, 1996)

Low-power radix-4 divider. - Alberto Nannarelli; Tomás Lang (ISLPED, 1996)

Cordic based parallel/pipelined architecture for the Hough transform. - Javier D. Bruguera; Nicolás Guil; Tomás Lang; Julio Villalba; Emilio L. Zapata (J. VLSI Signal Process., 1996)

On recoding in arithmetic algorithms. - Milos D. Ercegovac; Tomás Lang (J. VLSI Signal Process., 1996)

CORDIC-based computation of arccos and arcsin. - Tomás Lang; Elisardo Antelo (ASAP, 1997)

Low latency word serial CORDIC. - Julio Villalba; Tomás Lang (ASAP, 1997)

Reducing TLB power requirements. - Toni Juan; Tomás Lang; Juan J. Navarro (ISLPED, 1997)

Exploiting the locality of memory references to reduce the address bus energy. - Enric Musoll; Tomás Lang; Jordi Cortadella (ISLPED, 1997)

Error Analysis and Reduction for Angle Calculation Using the CORDIC Algorithm. - Elisardo Antelo; Javier D. Bruguera; Tomás Lang; Emilio L. Zapata (IEEE Trans. Computers, 1997)

Leading-one prediction scheme for latency improvement in single datapath floating-point adders. - Javier D. Bruguera; Tomás Lang (ICCD, 1998)

Extension of the working-zone-encoding method to reduce the energy on the microprocessor data bus. - Tomás Lang; Enric Musoll; Jordi Cortadella (ICCD, 1998)

Low-power radix-8 divider. - Alberto Nannarelli; Tomás Lang (ICCD, 1998)

Power-delay tradeoffs for radix-4 and radix-8 dividers. - Alberto Nannarelli; Tomás Lang (ISLPED, 1998)

Computation of sqrt(x/d) in a Very High Radix Combined Division/Square-Root Unit with Scaling. - Elisardo Antelo; Tomás Lang; Javier D. Bruguera (IEEE Trans. Computers, 1998)

CORDIC Vectoring with Arbitrary Target Value. - Tomás Lang; Elisardo Antelo (IEEE Trans. Computers, 1998)

Working-zone encoding for reducing the energy in microprocessor address buses. - Enric Musoll; Tomás Lang; Jordi Cortadella (IEEE Trans. Very Large Scale Integr. Syst., 1998)

Parallel Compensation of Scale Factor for the CORDIC Algorithm. - Julio Villalba; Tomás Lang; Emilio L. Zapata (J. VLSI Signal Process., 1998)

Very-High Radix CORDIC Vectoring with Scalings and Selection by Rounding. - Elisardo Antelo; Tomás Lang; Javier D. Bruguera (IEEE Symposium on Computer Arithmetic, 1999)

Low-Power Division: Comparison among Implementations of Radix 4, 8 and 16. - Alberto Nannarelli; Tomás Lang (IEEE Symposium on Computer Arithmetic, 1999)

Multilevel Reverse-Carry Computation for Comparison and for Sign and Overflow Detection in Addition. - Tomás Lang; Javier D. Bruguera (ICCD, 1999)

Low-Power Radix-4 Combined Division and Square Root. - Alberto Nannarelli; Tomás Lang (ICCD, 1999)

Leading-One Prediction with Concurrent Position Correction. - Javier D. Bruguera; Tomás Lang (IEEE Trans. Computers, 1999)

Very High Radix Square Root with Prescaling and Rounding and a Combined Division/Square Root Unit. - Tomás Lang; Paolo Montuschi (IEEE Trans. Computers, 1999)

Low-Power Divider. - Alberto Nannarelli; Tomás Lang (IEEE Trans. Computers, 1999)

Multilevel Reverse-Carry Adder. - Javier D. Bruguera; Tomás Lang (ICCD, 2000)

Very-High Radix Circular CORDIC: Vectoring and Unified Rotation/Vectoring. - Elisardo Antelo; Tomás Lang; Javier D. Bruguera (IEEE Trans. Computers, 2000)

Reciprocation, Square Root, Inverse Square Root, and Some Elementary Functions Using Small Multipliers. - Milos D. Ercegovac; Tomás Lang; Jean-Michel Muller; Arnaud Tisserand (IEEE Trans. Computers, 2000)

Very-High Radix CORDIC Rotation Based on Selection by Rounding. - Elisardo Antelo; Tomás Lang; Javier D. Bruguera (J. VLSI Signal Process., 2000)

CORDIC-Based Computation of ArcCos. - Tomás Lang; Elisardo Antelo (J. VLSI Signal Process., 2000)

Using the Reverse-Carry Approach for Double Datapath Floating-Point Addition. - Javier D. Bruguera; Tomás Lang (IEEE Symposium on Computer Arithmetic, 2001)

Correctly Rounded Reciprocal Square-Root by Digit Recurrence and Radix-4 Implementation. - Tomás Lang; Elisardo Antelo (IEEE Symposium on Computer Arithmetic, 2001)

Bounds on Runs of Zeros and Ones for Algebraic Functions. - Tomás Lang; Jean-Michel Muller (IEEE Symposium on Computer Arithmetic, 2001)

Boosting Very-High Radix Division with Prescaling and Selection by Rounding. - Paolo Montuschi; Tomás Lang (IEEE Trans. Computers, 2001)

Multilevel reverse most-significant carry computation. - Javier D. Bruguera; Tomás Lang (IEEE Trans. Very Large Scale Integr. Syst., 2001)

Fast Radix-4 Retimed Division with Selection by Comparisons. - Elisardo Antelo; Tomás Lang; Paolo Montuschi; Alberto Nannarelli (ASAP, 2002)

Floating-Point Fused Multiply-Add with Reduced Latency. - Tomás Lang; Javier D. Bruguera (ICCD, 2002)

Comments on "A carry-free 54 b×54 b multiplier using equivalent bit conversion algorithm". - Milos D. Ercegovac; Tomás Lang; Y. Kim; Bang-Sup Song; John Grosspietsch; Steven F. Gillig (IEEE J. Solid State Circuits, 2003)

Radix-4 Reciprocal Square-Root and Its Combination with Division and Square Root. - Tomás Lang; Elisardo Antelo (IEEE Trans. Computers, 2003)

Multilevel Reverse-Carry Addition: Single and Dual Adders. - Javier D. Bruguera; Tomás Lang (J. VLSI Signal Process., 2003)

Floating-Point Multiply-Add-Fused with Reduced Latency. - Tomás Lang; Javier D. Bruguera (IEEE Trans. Computers, 2004)

Low Latency Digit-Recurrence Reciprocal and Square-Root Reciprocal Algorithm and Architecture. - Elisardo Antelo; Tomás Lang; Paolo Montuschi; Alberto Nannarelli (IEEE Symposium on Computer Arithmetic, 2005)

Floating-Point Fused Multiply-Add: Reduced Latency for Floating-Point Addition. - Javier D. Bruguera; Tomás Lang (IEEE Symposium on Computer Arithmetic, 2005)

Digit-Recurrence Dividers with Reduced Logical Depth. - Elisardo Antelo; Tomás Lang; Paolo Montuschi; Alberto Nannarelli (IEEE Trans. Computers, 2005)

High-Throughput CORDIC-Based Geometry Operations for 3D Computer Graphics. - Tomás Lang; Elisardo Antelo (IEEE Trans. Computers, 2005)

Double-Residue Modular Range Reduction for Floating-Point Hardware Implementations. - Julio Villalba; Tomás Lang; Mario A. González (IEEE Trans. Computers, 2006)

Improving the Throughput of On-line Addition for Data Streams. - Julio Villalba; Javier Hormigo; Tomás Lang (ASAP, 2007)

A Radix-10 Digit-Recurrence Division Unit: Algorithm and Architecture. - Tomás Lang; Alberto Nannarelli (IEEE Trans. Computers, 2007)

Division Unit for Binary Integer Decimals. - Tomás Lang; Alberto Nannarelli (ASAP, 2009)

Comments on 'improving the speed of decimal division'. - Tomás Lang; Alberto Nannarelli (IET Comput. Digit. Tech., 2012)

Radix-2 Multioperand and Multiformat Streaming Online Addition. - Julio Villalba; Tomás Lang; Javier Hormigo (IEEE Trans. Computers, 2012)