Optimal Programming of Critical Sections in Modern Network Processors under Performance Requirements. - Henryk Krawczyk; Tomasz Madajczak (PARELEC, 2004)

An Optimal Abstraction Model for Hardware Multithreading in Modern Processor Architectures. - Tomasz Madajczak (PARELEC, 2004)

Implementing Critical Sections with the Shared Explicit Cache System in the Shared Memory Parallel Architectures. - Tomasz Madajczak; Henryk Krawczyk (PARCO, 2005)

Taking Advantage of the SHECS-Based Critical Sections in the Shared Memory Parallel Architectures. - Tomasz Madajczak (PPAM, 2005)

Integrating SHECS-Based Critical Sections with Hardware SMP Scheduler in TLP-CMPs. - Tomasz Madajczak; Henryk Krawczyk (PARELEC, 2006)