A Low Memory Requirements Execution Flow for the Non-Uniform Grid Projection Super-Resolution Algorithm. - Tomasz Szydzik; Gustavo M. Callicó; Antonio Núñez (ISM, 2011)

Efficient FPGA implementation of a high-quality super-resolution algorithm with real-time performance. - Tomasz Szydzik; Gustavo M. Callicó; Antonio Núñez (IEEE Trans. Consumer Electron., 2011)

Scalable Video Coding Deblocking Filter FPGA and ASIC Implementation Using High-Level Synthesis Methodology. - Pedro P. Carballo; Omar Espino; Romén Neris; Pedro Hernandez-Fernandez; Tomasz Szydzik; Antonio Núñez (DSD, 2013)

Contributions to visualization algorithm enabling GPU-accelerated image displaying for dual panel high dynamic range LCD display. - Tomasz Szydzik; Antonio Núñez; Lode De Paepe; Luigi Albani (ISPA, 2013)

Level-3 BLAS on myriad multi-core media-processor SoC. - Tomasz Szydzik; Marius Farcas; Valeriu Ohan; David Moloney (Hot Chips Symposium, 2014)

Precision refinement for media-processor SoCs: fp32 -> fp64 on myriad. - Tomasz Szydzik; David Moloney (Hot Chips Symposium, 2014)