Multiple-Valued VLSI Architecture for Intra-Chip Packet Data Transfer. - Tomoaki Hasegawa; Yuya Homma; Michitaka Kameyama (ISMVL, 2005)

Implementation and Evaluation of a Fine-Grain Multiple-Valued Field Programmable VLSI Based on Source-Coupled Logic. - Haque Mohammad Munirul; Tomoaki Hasegawa; Michitaka Kameyama (ISMVL, 2005)

Evaluation of Multiple-Valued Packet Multiplexing Scheme for Network-on-Chip Architecture. - Haque Mohammad Munirul; Tomoaki Hasegawa; Michitaka Kameyama (ISMVL, 2006)