SAR ADC algorithm with redundancy. - Tomohiko Ogawa; Haruo Kobayashi 001; Masao Hotta; Yosuke Takahashi; Hao San; Nobukazu Takai (APCCAS, 2008)

SAR ADC that is configurable to optimize yield. - Tomohiko Ogawa; Haruo Kobayashi 001; Yohei Tan; Satoshi Ito; Satoshi Uemori; Nobukazu Takai; Kiichi Niitsu; Takahiro J. Yamaguchi; Tatsuji Matsuura; Nobuyoshi Ishikawa (APCCAS, 2010)

Non-binary SAR ADC with digital error correction for low power applications. - Tomohiko Ogawa; Tatsuji Matsuura; Haruo Kobayashi 001; Nobukazu Takai; Masao Hotta; Hao San; Akira Abe; Katsuyoshi Yagi; Toshihiko Mori (APCCAS, 2010)

SAR ADC Algorithm with Redundancy and Digital Error Correction. - Tomohiko Ogawa; Haruo Kobayashi 001; Yosuke Takahashi; Nobukazu Takai; Masao Hotta; Hao San; Tatsuji Matsuura; Akira Abe; Katsuyoshi Yagi; Toshihiko Mori (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2010)

Design for Testability That Reduces Linearity Testing Time of SAR ADCs. - Tomohiko Ogawa; Haruo Kobayashi 001; Satoshi Uemori; Yohei Tan; Satoshi Ito; Nobukazu Takai; Takahiro J. Yamaguchi; Kiichi Niitsu (IEICE Trans. Electron., 2011)