A video codec LSI for high-definition TV systems with one-transistor DRAM line memories. - Tomoji Takada; Takeshi Oto; Kazukuni Kitagaki; Naoyuki Hatanaka; Tatsuhiko Demura; Hiromichi Fuji; Toshinori Odaka; Hiroshi Sue; Tadahiro Oku (IEEE J. Solid State Circuits, 1989)

A new DSP architecture suited for image analysis. - Takeshi Oto; Kazukuni Kitagaki; Tatsuhiko Demura; Yoshitsugu Araki; Tomoji Takada (ICASSP, 1991)

A floating-point cell library and a 100-Mflops image signal processor. - Hiroshige Fujii; Chikahiro Hori; Tomoji Takada; Naoyuki Hatanaka; Tatsuhiko Demura; Goichi Ootomo (IEEE J. Solid State Circuits, 1992)