Memory design using a one-transistor gain cell on SOI. - Takashi Ohsawa; Katsuyuki Fujita; Tomoki Higashi; Yoshihisa Iwata; Takeshi Kajiyama; Yoshiaki Asao; Kazumasa Sunouchi (IEEE J. Solid State Circuits, 2002)

Design of a 128-mb SOI DRAM using the floating body cell (FBC). - Takashi Ohsawa; Katsuyuki Fujita; Kosuke Hatsuda; Tomoki Higashi; Tomoaki Shino; Yoshihiro Minami; Hiroomi Nakajima; Mutsuo Morikado; Kazumi Inoh; Takeshi Hamamoto; Shigeyoshi Watanabe; Shuso Fujii; et al. (IEEE J. Solid State Circuits, 2006)

Generation of Accurate Reference Current for Data Sensing in High-Density Memories by Averaging Multiple Pairs of Dummy Cells. - Takashi Ohsawa; Kosuke Hatsuda; Katsuyuki Fujita; Fumiyoshi Matsuoka; Tomoki Higashi (IEEE J. Solid State Circuits, 2011)