NSIM: An Interconnection Network Simulator for Extreme-Scale Parallel Computers. - Hideki Miwa; Ryutaro Susukita; Hidetomo Shibamura; Tomoya Hirao; Jun Maki; Makoto Yoshida; Takayuki Kando; Yuichiro Ajima; Ikuo Miyoshi; Toshiyuki Shimizu; Yuji Oinaga; Hisashige Ando; et al. (IEICE Trans. Inf. Syst., 2011)

SMYLEref: A reference architecture for manycore-processor SoCs. - Masaaki Kondo; Son Truong Nguyen; Tomoya Hirao; Takeshi Soga; Hiroshi Sasaki 001; Koji Inoue (ASP-DAC, 2013)

A Prototype System for Many-Core Architecture SMYLEref with FPGA Evaluation Boards. - Son-Truong Nguyen; Masaaki Kondo; Tomoya Hirao; Koji Inoue (IEICE Trans. Inf. Syst., 2013)

A flexible hardware barrier mechanism for many-core processors. - Takeshi Soga; Hiroshi Sasaki 001; Tomoya Hirao; Masaaki Kondo; Koji Inoue (ASP-DAC, 2015)

A software bridged data transfer on a FPGA cluster by using pipelining and InfiniBand verbs. - Takaaki Miyajima; Tomoya Hirao; Naoya Miyamoto; Jeongdo Son; Kentaro Sano (HEART, 2019)