Performance of Adaptive Mesh Refinement Scheme for Hydrodynamics on Simulations of Expanding Supernova Envelope. - Ayato Noro; Tomoya Ogawa; Takuma Ohta; Kazuyuki Yamashita; Shigeki Miyaji; Mitue Den (ISHPC, 2002)

Similarity of Documents Using Reconfiguration of Thesaurus. - Tomoya Ogawa; Nobuhiro Inuzuka (KES, 2004)

A 1.8-V 256-Mb Multilevel Cell NOR Flash Memory With BGO Function. - Taku Ogura; Masahiro Hosoda; Tomoya Ogawa; Tamiyu Kato; Akihiko Kanda; Tomoyuki Fujisawa; Satoshi Shimizu; Masafumi Katsumata (IEEE J. Solid State Circuits, 2006)

40nm embedded SG-MONOS flash macros for automotive with 160MHz random access for code and endurance over 10M cycles for data. - Takashi Kono; Takashi Ito; Tamaki Tsuruda; Takayuki Nishiyama; Tsutomu Nagasawa; Tomoya Ogawa; Yoshiyuki Kawashima; Hideto Hidaka; Tadaaki Yamauchi (ISSCC, 2013)

40-nm Embedded Split-Gate MONOS (SG-MONOS) Flash Macros for Automotive With 160-MHz Random Access for Code and Endurance Over 10 M Cycles for Data at the Junction Temperature of 170°C. - Takashi Kono; Takashi Ito; Tamaki Tsuruda; Takayuki Nishiyama; Tsutomu Nagasawa; Tomoya Ogawa; Yoshiyuki Kawashima; Hideto Hidaka; Tadaaki Yamauchi (IEEE J. Solid State Circuits, 2014)

Development of Multi-hop Field Sensor Networks with Arduino Board. - Tomoya Ogawa; Katsuhiro Naito (IIMSS, 2016)

A 24MB Embedded Flash System Based on 28nm SG-MONOS Featuring 240MHz Read Operations and Robust Over-The-Air Software Update for Automotive. - Akihiko Kanda; Takashi Kurafuji; Koichi Takeda; Tomoya Ogawa; Yasuhiko Taito; Kazuo Yoshihara; Masaya Nakano; Takashi Ito; Hiroyuki Kondo; Takashi Kono (VLSI Circuits, 2019)

A 40nm Embedded SG-MONOS Flash Macro for High-end MCU Achieving 200MHz Random Read Operation and 7.91Mb/mm2 Density with Charge Assisted Offset Cancellation Sense Amplifier. - Masaya Nakano; Yoshinobu Kaneda; Koichi Takeda; Takahiro Shimoi; Yasunobu Aoki; Satoru Nakanishi; Yosuke Tashiro; Yasuhiko Taito; Ken Matsubara; Munekatsu Nakagawa; Tomoya Ogawa; Takashi Kurafuji; et al. (A-SSCC, 2021)

A 22nm 32Mb Embedded STT-MRAM Macro Achieving 5.9ns Random Read Access and 5.8MB/s Write Throughput at up to Tj of 150 °C. - Takahiro Shimoi; Ken Matsubara; Tomoya Saito; Tomoya Ogawa; Yasuhiko Taito; Yoshinobu Kaneda; Masayuki Izuna; Koichi Takeda; Hidenori Mitani; Takashi Ito; Takashi Kono (VLSI Technology and Circuits, 2022)

A 40-nm Embedded SG-MONOS Flash Macro for High-End MCU Achieving 200-MHz Random Read Operation and 7.91-Mb/mm2 Density With Charge-Assisted Offset Cancellation Sense Amplifier. - Masaya Nakano; Yoshinobu Kaneda; Satoru Nakanishi; Yasumitsu Murai; Yosuke Tashiro; Yasuhiko Taito; Tomoya Ogawa; Hidenori Mitani; Takashi Ito; Takashi Kono (IEEE J. Solid State Circuits, 2022)

15.8 A 22nm 10.8Mb Embedded STT-MRAM Macro Achieving over 200MHz Random-Read Access and a 10.4MB/s Write Throughput with an In-Field Programmable 0.3Mb MTJ-OTP for High-End MCUs. - Tomoya Ogawa; Ken Matsubara; Yasuhiko Taito; Tomoya Saito; Masayuki Izuna; Koichi Takeda; Yoshinobu Kaneda; Takahiro Shimoi; Hidenori Mitani; Takashi Ito; Takashi Kono (ISSCC, 2024)

A 22-nm 32-Mb Embedded STT-MRAM Macro Achieving 5.9-ns Random Read Access and 7.4-MB/s Write Throughput at up to 150 °C. - Takahiro Shimoi; Ken Matsubara; Tomoya Saito; Tomoya Ogawa; Yasuhiko Taito; Yoshinobu Kaneda; Masayuki Izuna; Koichi Takeda; Hidenori Mitani; Takashi Ito; Takashi Kono (IEEE J. Solid State Circuits, 2024)