Augmenting low-latency HPC network with free-space optical links. - Ikki Fujiwara; Michihiro Koibuchi; Tomoya Ozaki; Hiroki Matsutani; Henri Casanova (HPCA, 2015)

Expandable Chip Stacking Method for Many-core Architectures Consisting of Tiny Chips. - Hiroshi Nakahara; Tomoya Ozaki; Hiroki Matsutani; Michihiro Koibuchi; Hideharu Amano (MCSoC, 2015)

Novel Chip Stacking Methods to Extend Both Horizontally and Vertically for Many-Core Architectures with ThrouChip Interface. - Hiroshi Nakahara; Tomoya Ozaki; Hiroki Matsutani; Michihiro Koibuchi; Hideharu Amano (IEICE Trans. Inf. Syst., 2016)