A sequential circuit structure with combinational test generation complexity and its application. - Hideo Fujiwara; Satoshi Ohtake; Tomoya Takasaki (Syst. Comput. Jpn., 1997)

Partial scan design methods based on internally balanced structure. - Tomoya Takasaki; Tomoo Inoue; Hideo Fujiwara (Syst. Comput. Jpn., 1998)

A High-Level Synthesis Approach to Partial Scan Design Based on Acyclic Structure. - Tomoya Takasaki; Hideo Fujiwara; Tomoo Inoue (Asian Test Symposium, 1999)