A precise event-driven circuit simulator based on predicted fan-in voltages. - Hisanori Fujisawa; Fumiyo Kawafuji; Tomoyasu Kitaura; Tetsuro Kage (ED&TC, 1995)

Accurate prediction of the impact of on-chip inductance on interconnect delay using electrical and physical parameter-based RSF. - Takashi Sato 001; Toshiki Kanamoto; Atsushi Kurokawa; Yoshiyuki Kawakami; Hiroki Oka; Tomoyasu Kitaura; Hiroyuki Kobayashi; Masanori Hashimoto (ASP-DAC, 2003)