A widely tunable CMOS Gm-C filter with a negative source degeneration resistor transconductor. - Shinichi Hori; Tadashi Maeda; Hitoshi Yano; Noriaki Matsuno; Keiichi Numata; Nobuhide Yoshida; Yuji Takahashi; Tomoyuki Yamase; Robert Walkington; Hikaru Hikaru (ESSCIRC, 2003)

A Low-Power Dual-Band Triple-Mode WLAN CMOS Transceiver. - Tadashi Maeda; Noriaki Matsuno; Shinichi Hori; Tomoyuki Yamase; Takashi Tokairin; Kiyoshi Yanagisawa; Hitoshi Yano; Robert Walkington; Keiichi Numata; Nobuhide Yoshida; Yuji Takahashi; Hikaru Hida (IEEE J. Solid State Circuits, 2006)

Low-power-consumption direct-conversion CMOS transceiver for multi-standard 5-GHz wireless LAN systems with channel bandwidths of 5-20 MHz. - Tadashi Maeda; Hitoshi Yano; Shinichi Hori; Noriaki Matsuno; Tomoyuki Yamase; Takashi Tokairin; Robert Walkington; Nobuhide Yoshida; Keiichi Numata; Kiyoshi Yanagisawa; Yuji Takahashi; Masahiro Fujii; et al. (IEEE J. Solid State Circuits, 2006)

A 40Gb/s multi-data-rate CMOS transceiver chipset with SFI-5 interface for optical transmission systems. - Yasushi Amamiya; Shunichi Kaeriyama; Hidemi Noguchi; Zin Yamazaki; Tomoyuki Yamase; Ken'ichi Hosoya; Minoru Okamoto; Shiro Tomari; Hiroshi Yamaguchi; Hiroaki Shoda; Hironobu Ikeda; Shinji Tanaka; et al. (ISSCC, 2009)

A 40 Gb/s Multi-Data-Rate CMOS Transmitter and Receiver Chipset With SFI-5 Interface for Optical Transmission Systems. - Shunichi Kaeriyama; Yasushi Amamiya; Hidemi Noguchi; Zin Yamazaki; Tomoyuki Yamase; Ken'ichi Hosoya; Minoru Okamoto; Shiro Tomari; Hiroshi Yamaguchi; Hiroaki Shoda; Hironobu Ikeda; Shinji Tanaka; et al. (IEEE J. Solid State Circuits, 2009)