A novel test methodology based on error-rate to support error-tolerance. - Kuen-Jong Lee; Tong-Yu Hsieh; Melvin A. Breuer (ITC, 2005)

An Error-Oriented Test Methodology to Improve Yield with Error-Tolerance. - Tong-Yu Hsieh; Kuen-Jong Lee; Melvin A. Breuer (VTS, 2006)

Test Efficiency Analysis and Improvement of SOC Test Platforms. - Tong-Yu Hsieh; Kuen-Jong Lee; Jian-Jhih You (ATS, 2007)

Reduction of detected acceptable faults for yield improvement via error-tolerance. - Tong-Yu Hsieh; Kuen-Jong Lee; Melvin A. Breuer (DATE, 2007)

An Error Rate Based Test Methodology to Support Error-Tolerance. - Tong-Yu Hsieh; Kuen-Jong Lee; Melvin A. Breuer (IEEE Trans. Reliab., 2008)

Tolerance of performance degrading faults for effective yield improvement. - Tong-Yu Hsieh; Melvin A. Breuer; Murali Annavaram; Sandeep K. Gupta 001; Kuen-Jong Lee (ITC, 2009)

On-Chip SOC Test Platform Design Based on IEEE 1500 Standard. - Kuen-Jong Lee; Tong-Yu Hsieh; Chin-Yao Chang; Yu-Ting Hong; Wen-Cheng Huang (IEEE Trans. Very Large Scale Integr. Syst., 2010)

An Error-Tolerance-Based Test Methodology to Support Product Grading for Yield Enhancement. - Tong-Yu Hsieh; Kuen-Jong Lee; Melvin A. Breuer (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2011)

Test Response Compaction via Output Bit Selection. - Kuen-Jong Lee; Wei-Cheng Lien; Tong-Yu Hsieh (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2011)

A yield and reliability enhancement framework for image processing applications. - Tong-Yu Hsieh; Chia-Chi Ku; Chia-Hung Yeh (APCCAS, 2012)

A Test-Per-Clock LFSR Reseeding Algorithm for Concurrent Reduction on Test Sequence Length and Test Data Volume. - Wei-Cheng Lien; Kuen-Jong Lee; Tong-Yu Hsieh (Asian Test Symposium, 2012)

Accumulator-based output selection for test response compaction. - Wei-Cheng Lien; Kuen-Jong Lee; Tong-Yu Hsieh; Shih-Shiun Chien; Krishnendu Chakrabarty (ISCAS, 2012)

Routing-efficient implementation of an internal-response-based BIST architecture. - Wei-Cheng Lien; Tong-Yu Hsieh; Kuen-Jong Lee (VLSI-DAT, 2012)

Efficient Overdetection Elimination of Acceptable Faults for Yield Improvement. - Kuen-Jong Lee; Tong-Yu Hsieh; Melvin A. Breuer (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2012)

An Efficient Test Methodology for Image Processing Applications Based on Error-Tolerance. - Tong-Yu Hsieh; Yi-Han Peng; Chia-Chi Ku (Asian Test Symposium, 2013)

A New LFSR Reseeding Scheme via Internal Response Feedback. - Wei-Cheng Lien; Kuen-Jong Lee; Tong-Yu Hsieh; Krishnendu Chakrabarty (Asian Test Symposium, 2013)

An Efficient On-Chip Test Generation Scheme Based on Programmable and Multiple Twisted-Ring Counters. - Wei-Cheng Lien; Kuen-Jong Lee; Tong-Yu Hsieh; Wee-Lung Ang (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2013)

Counter-Based Output Selection for Test Response Compaction. - Wei-Cheng Lien; Kuen-Jong Lee; Tong-Yu Hsieh; Krishnendu Chakrabarty; Yu-Hua Wu (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2013)

Output-bit selection with X-avoidance using multiple counters for test-response compaction. - Wei-Cheng Lien; Kuen-Jong Lee; Krishnendu Chakrabarty; Tong-Yu Hsieh (ETS, 2014)

On efficient error-tolerability evaluation and maximization for image processing applications. - Tong-Yu Hsieh; Kuan-Hsien Li; Yi-Han Peng (VLSI-DAT, 2014)

Output selection for test response compaction based on multiple counters. - Wei-Cheng Lien; Kuen-Jong Lee; Krishnendu Chakrabarty; Tong-Yu Hsieh (VLSI-DAT, 2014)

Efficient Error-Tolerability Testing on Image Processing Circuits Based on Equivalent Error Rate Transformation. - Tong-Yu Hsieh; Yi-Han Peng; Kuan-Hsien Li (J. Electron. Test., 2014)

Efficient LFSR Reseeding Based on Internal-Response Feedback. - Wei-Cheng Lien; Kuen-Jong Lee; Tong-Yu Hsieh; Krishnendu Chakrabarty (J. Electron. Test., 2014)

Filtering-based error-tolerability evaluation of image processing circuits. - Tong-Yu Hsieh; Yi-Han Peng (IOLTS, 2015)

Performance Degradation Tolerance Analysis and Design for Effective Yield Enhancement. - Tong-Yu Hsieh; Chih-Hao Wang; Chun-Wei Kuo; Shu-Yu Huang; Tsung-Liang Chih (J. Electron. Test., 2015)

An Area-Efficient Scalable Test Module to Support Low Pin-Count Testing. - Tong-Yu Hsieh; Tai-Ping Wang; Shuo Yang; Chin-An Hsu; Yi-Lung Lin (IEICE Trans. Electron., 2016)

A Performance Degradation Tolerable Cache Design by Exploiting Memory Hierarchies. - Tong-Yu Hsieh; Chih-Hao Wang; Tsung-Liang Chih; Ya-Hsiu Chi (IEEE Trans. Very Large Scale Integr. Syst., 2016)

Error-Tolerability Evaluation and Test for Images in Face Detection Applications. - Tong-Yu Hsieh; Tai-Ang Cheng; Chao-Ru Chen (ATS, 2017)

A hybrid concurrent error detection scheme for simultaneous improvement on probability of detection and diagnosability. - Chih-Hao Wang; Tong-Yu Hsieh (ITC-Asia, 2017)

A fault-analysis oriented re-design and cost-effectiveness evaluation methodology for error tolerant applications. - Tong-Yu Hsieh; Kuan-Hsien Li; Chen-Chia Chung (Microelectron. J., 2017)

Cost-Effective Enhancement on Both Yield and Reliability for Cache Designs Based on Performance Degradation Tolerance. - Tong-Yu Hsieh; Tsung-Liang Chih; Mei-Jung Wu (IEEE Trans. Very Large Scale Integr. Syst., 2017)

On no-reference on-line error-tolerability testing for videos. - Tong-Yu Hsieh; Shang-En Chan; Chi-Hsuan Ho (ETS, 2018)

A No-Reference Error-Tolerability Test Methodology for Image Processing Applications. - Tong-Yu Hsieh; Chao-Ru Chen (ITC-Asia, 2018)

Error Indication Signal Collapsing for Implication-Based Concurrent Error Detection. - Chih-Hao Wang; Chi-Hsuan Ho; Tong-Yu Hsieh (ITC-Asia, 2018)

Structural Variance-Based Error-Tolerability Test Method for Image Processing Applications. - Tong-Yu Hsieh; Yi-Han Peng; Kuan-Chih Cheng (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018)

On Probability of Detection Lossless Concurrent Error Detection Based on Implications. - Chih-Hao Wang; Tong-Yu Hsieh (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018)

On Automatic Generation of Training Images for Machine Learning in Automotive Applications. - Tong-Yu Hsieh; Yuan-Cheng Lin; Hsin-Yung Shen (AICAS, 2019)

A Delay-Aware Implementation Scheme for Cost-Effective Implication-Based Concurrent Error Detection. - Tong-Yu Hsieh; Kuang-Chun Lin; Hsin-Hsien Lin (ITC-Asia, 2019)

A Self-Detection and Self-Repair Methodology for Reliable Speech Recognition Considering AWGN Noises. - Tong-Yu Hsieh; Yu-Min Chung (ITC-Asia, 2020)

On Enhancing Error-Tolerability of Videos via Re-Encoding with Adaptive I-Frame Insertion. - Tong-Yu Hsieh; Chen-Chia Chung; Jun-Tsung Wu (ITC-Asia, 2020)

Cost-Effective Reliable Edge Computing Hardware Design Based on Module Simplification and Duplication: A Case Study on Vehicle Detection Based on Support Vector Machine. - Tong-Yu Hsieh; Hsin-Yung Shen; Chia-Teng Hsu (VLSI-DAT, 2020)

On Classification of Acceptable Images for Reliable Artificial Intelligence Systems: A Case Study on Pedestrian Detection. - Tong-Yu Hsieh; Pin-Xuan Wu; Chun-Chao Cheng (VTS, 2020)

An Implication-based Test Scheme for Both Diagnosis and Concurrent Error Detection Applications. - Chih-Hao Wang; Tong-Yu Hsieh (ACM Trans. Design Autom. Electr. Syst., 2020)

Investigation on Error-Tolerability Enhancement of Videos via Re-Encoding for Computer Vision: A Case Study on Object Detection. - Tong-Yu Hsieh; Jun-Tsung Wu (ICCE-TW, 2021)

Concurrent Test of Reconfigurable Scan Networks for Self-Aware Systems. - Chih-Hao Wang; Natalia Lylina; Ahmed Atteya; Tong-Yu Hsieh; Hans-Joachim Wunderlich (IOLTS, 2021)

On No-Reference Error Detection of an Image Stitching System Based on Error-Tolerance. - Tong-Yu Hsieh; Pao-Wei Tsui; Jun-Tsung Wu (ATS, 2022)

Cost-Effective Error-Mitigation for High Memory Error Rate of DNN: A Case Study on YOLOv4. - Wei-Ji Chao; Tong-Yu Hsieh (ITC-Asia, 2023)

On Development of Reliable Machine Learning Systems Based on Machine Error Tolerance of Input Images. - Tong-Yu Hsieh; Chun-Chao Cheng; Wei-Ji Chao; Pin-Xuan Wu (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2023)

On Accuracy Enhancement of No-Reference Error-Tolerability Testing for Images in Object Detection Applications Based on RGB Channel Characteristics. - Jun-Tsung Wu; Hideyuki Ichihara; Tomoo Inoue; Tong-Yu Hsieh (ITC-Asia, 2024)