Prototyping the DySER specialization architecture with OpenSPARC. - Jesse Benson; Ryan Cofell; Chris Frericks; Venkatraman Govindaraju; Chen-Han Ho; Zachary Marzec; Tony Nowatzki; Karu Sankaralingam (Hot Chips Symposium, 2012)

Design, integration and implementation of the DySER hardware accelerator into OpenSPARC. - Jesse Benson; Ryan Cofell; Chris Frericks; Chen-Han Ho; Venkatraman Govindaraju; Tony Nowatzki; Karthikeyan Sankaralingam (HPCA, 2012)

DySER: Unifying Functionality and Parallelism Specialization for Energy-Efficient Computing. - Venkatraman Govindaraju; Chen-Han Ho; Tony Nowatzki; Jatin Chhugani; Nadathur Satish; Karthikeyan Sankaralingam; Changkyu Kim (IEEE Micro, 2012)

Breaking SIMD shackles with an exposed flexible microarchitecture and the access execute PDG. - Venkatraman Govindaraju; Tony Nowatzki; Karthikeyan Sankaralingam (PACT, 2013)

A general constraint-centric scheduling framework for spatial architectures. - Tony Nowatzki; Michael Sartin-Tarm; Lorenzo De Carli; Karthikeyan Sankaralingam; Cristian Estan; Behnam Robatmili (PLDI, 2013)

Constraint centric scheduling guide. - Michael Sartin-Tarm; Tony Nowatzki; Lorenzo De Carli; Karthikeyan Sankaralingam; Cristian Estan (SIGARCH Comput. Archit. News, 2013)

Optimization and Mathematical Modeling in Computer Architecture - Tony Nowatzki; Michael C. Ferris; Karu Sankaralingam; Cristian Estan; Nilay Vaish; David A. Wood 001 (Morgan & Claypool Publishers, 2013)

A Scheduling Framework for Spatial Architectures Across Multiple Constraint-Solving Theories. - Tony Nowatzki; Michael Sartin-Tarm; Lorenzo De Carli; Karthikeyan Sankaralingam; Cristian Estan; Behnam Robatmili (ACM Trans. Program. Lang. Syst., 2014)

Exploring the potential of heterogeneous von neumann/dataflow execution models. - Tony Nowatzki; Vinay Gangadhar; Karthikeyan Sankaralingam (ISCA, 2015)

Performance evaluation of a DySER FPGA prototype system spanning the compiler, microarchitecture, and hardware implementation. - Chen-Han Ho; Venkatraman Govindaraju; Tony Nowatzki; Ranjini Nagaraju; Zachary Marzec; Preeti Agarwal; Chris Frericks; Ryan Cofell; Karthikeyan Sankaralingam (ISPASS, 2015)

A Graph-Based Program Representation for Analyzing Hardware Specialization Approaches. - Tony Nowatzki; Venkatraman Govindaraju; Karthikeyan Sankaralingam (IEEE Comput. Archit. Lett., 2015)

Architectural Simulators Considered Harmful. - Tony Nowatzki; Jaikrishnan Menon; Chen-Han Ho; Karthikeyan Sankaralingam (IEEE Micro, 2015)

Comprehensive Circuit Failure Prediction for Logic and SRAM Using Virtual Aging. - Amir Yazdanbakhsh; Raghuraman Balasubramanian; Tony Nowatzki; Karthikeyan Sankaralingam (IEEE Micro, 2015)

Analyzing Behavior Specialized Acceleration. - Tony Nowatzki; Karthikeyan Sankaralingam (ASPLOS, 2016)

Modularizing the microprocessor core to outperform traditional out-of-order. - Tony Nowatzki; Karthikeyan Sankaralingam (Hot Chips Symposium, 2016)

Pushing the limits of accelerator efficiency while retaining programmability. - Tony Nowatzki; Vinay Gangadhar; Karthikeyan Sankaralingam; Greg Wright (HPCA, 2016)

Software transparent dynamic binary translation for coarse-grain reconfigurable architectures. - Matthew A. Watkins; Tony Nowatzki; Anthony Carno (HPCA, 2016)

Open-source Hardware: Opportunities and Challenges. - Gagan Gupta 003; Tony Nowatzki; Vinay Gangadhar; Karthikeyan Sankaralingam (CoRR, 2016)

A Heterogeneous Von Neumann/Explicit Dataflow Processor. - Tony Nowatzki; Vinay Gangadhar; Karthikeyan Sankaralingam (IEEE Micro, 2016)

Stream-Dataflow Acceleration. - Tony Nowatzki; Vinay Gangadhar; Newsha Ardalani; Karthikeyan Sankaralingam (ISCA, 2017)

Kickstarting Semiconductor Innovation with Open Source Hardware. - Gagan Gupta 003; Tony Nowatzki; Vinay Gangadhar; Karthikeyan Sankaralingam (Computer, 2017)

Domain Specialization Is Generally Unnecessary for Accelerators. - Tony Nowatzki; Vinay Gangadhar; Karthikeyan Sankaralingam; Greg Wright (IEEE Micro, 2017)

Hybrid optimization/heuristic instruction scheduling for programmable accelerator codesign. - Tony Nowatzki; Newsha Ardalani; Karthikeyan Sankaralingam; Jian Weng 002 (PACT, 2018)

Stream-based memory access specialization for general purpose processors. - Zhengrong Wang; Tony Nowatzki (ISCA, 2019)

Towards General Purpose Acceleration by Exploiting Common Data-Dependence Forms. - Vidushi Dadu; Jian Weng 002; Sihao Liu; Tony Nowatzki (MICRO, 2019)

μIR -An intermediate representation for transforming and optimizing the microarchitecture of application accelerators. - Amirali Sharifian; Reza Hojabr; Navid Rahimi; Sihao Liu; Apala Guha; Tony Nowatzki; Arrvindh Shriraman (MICRO, 2019)

Heterogeneous Von Neumann/dataflow microprocessors. - Tony Nowatzki; Vinay Gangadhar; Karthikeyan Sankaralingam (Commun. ACM, 2019)

DAEGEN: A Modular Compiler for Exploring Decoupled Spatial Accelerators. - Jian Weng 002; Sihao Liu; Vidushi Dadu; Tony Nowatzki (IEEE Comput. Archit. Lett., 2019)

Exploiting Fine-Grain Ordered Parallelism in Dense Matrix Algorithms. - Jian Weng 002; Vidushi Dadu; Tony Nowatzki (CoRR, 2019)

A Hybrid Systolic-Dataflow Architecture for Inductive Matrix Algorithms. - Jian Weng 002; Sihao Liu; Zhengrong Wang; Vidushi Dadu; Tony Nowatzki (HPCA, 2020)

DSAGEN: Synthesizing Programmable Spatial Accelerators. - Jian Weng 002; Sihao Liu; Vidushi Dadu; Zhengrong Wang; Preyas Shah; Tony Nowatzki (ISCA, 2020)

Towards General-Purpose Acceleration: Finding Structure in Irregularity. - Vidushi Dadu; Jian Weng 002; Sihao Liu; Tony Nowatzki (IEEE Micro, 2020)

UNIT: Unifying Tensorized Instruction Compilation. - Jian Weng 002; Animesh Jain; Jie Wang 022; Leyuan Wang; Yida Wang 003; Tony Nowatzki (CGO, 2021)

Mozart: Designing for Software Maturity and the Next Paradigm for Chip Architectures. - Karu Sankaralingam; Tony Nowatzki; Greg Wright; Poly Palamuttam; Jitu Khare; Vinay Gangadhar; Preyas Shah (HCS, 2021)

Stream Floating: Enabling Proactive and Decentralized Cache Optimizations. - Zhengrong Wang; Jian Weng 002; Jason Lowe-Power; Jayesh Gaur; Tony Nowatzki (HPCA, 2021)

PolyGraph: Exposing the Value of Flexibility for Graph Processing Accelerators. - Vidushi Dadu; Sihao Liu; Tony Nowatzki (ISCA, 2021)

Hardware Acceleration of Sparse and Irregular Tensor Computations of ML Models: A Survey and Insights. - Shail Dave; Riyadh Baghdadi; Tony Nowatzki; Sasikanth Avancha; Aviral Shrivastava; Baoxin Li (Proc. IEEE, 2021)

TaskStream: accelerating task-parallel workloads by recovering program structure. - Vidushi Dadu; Tony Nowatzki (ASPLOS, 2022)

Near-Stream Computing: General and Transparent Near-Cache Acceleration. - Zhengrong Wang; Jian Weng 002; Sihao Liu; Tony Nowatzki (HPCA, 2022)

The Mozart reuse exposed dataflow processor for AI and beyond: industrial product. - Karthikeyan Sankaralingam; Tony Nowatzki; Vinay Gangadhar; Preyas Shah; Michael Davies; William Galliher; Ziliang Guo; Jitu Khare; Deepak Vijay; Poly Palamuttam; Maghawan Punde; Alex Tan; et al. (ISCA, 2022)

A programmable, energy-minimal dataflow compiler and architecture. - Graham Gobieski; Souradip Ghosh; Marijn Heule; Todd C. Mowry; Tony Nowatzki; Nathan Beckmann; Brandon Lucia (MICRO, 2022)

OverGen: Improving FPGA Usability through Domain-specific Overlay Generation. - Sihao Liu; Jian Weng 002; Dylan Kupsh; Atefeh Sohrabizadeh; Zhengrong Wang; Licheng Guo; Jiuyang Liu; Maxim Zhulin; Rishabh Mani; Lucheng Zhang; Jason Cong; Tony Nowatzki (MICRO, 2022)

Infinity Stream: Enabling Transparent and Automated In-Memory Computing. - Zhengrong Wang; Christopher Liu; Tony Nowatzki (IEEE Comput. Archit. Lett., 2022)

Unifying Spatial Accelerator Compilation With Idiomatic and Modular Transformations. - Jian Weng 002; Sihao Liu; Dylan Kupsh; Tony Nowatzki (IEEE Micro, 2022)

Explainable-DSE: An Agile and Explainable Exploration of Efficient HW/SW Codesigns of Deep Learning Accelerators Using Bottleneck Analysis. - Shail Dave; Tony Nowatzki; Aviral Shrivastava (ASPLOS (4), 2023)

Infinity Stream: Portable and Programmer-Friendly In-/Near-Memory Fusion. - Zhengrong Wang; Christopher Liu; Aman Arora 001; Lizy Kurian John; Tony Nowatzki (ASPLOS (3), 2023)

Affinity Alloc: Taming Not-So Near-Data Computing. - Zhengrong Wang; Christopher Liu; Nathan Beckmann; Tony Nowatzki (MICRO, 2023)

PIMSAB: A Processing-In-Memory System with Spatially-Aware Communication and Bit-Serial-Aware Computation. - Aman Arora 001; Jian Weng 002; Siyuan Ma; Tony Nowatzki; Lizy K. John (CoRR, 2023)

SPGPU: Spatially Programmed GPU. - Shizhuo Zhu; Illia Shkirko; Jacob Levinson; Zhengrong Wang; Tony Nowatzki (IEEE Comput. Archit. Lett., 2024)

Monza: An Energy-Minimal, General-Purpose Dataflow System-on-Chip for the Internet of Things. - Nathan Beckmann; Brandon Lucia; Graham Gobieski; Tony Nowatzki; Thomas C. Jackson; Guénolé Lallement; Keyi Zhang; Amolak Nagi; Atharv Sathe; Harsh Desai (IEEE Micro, 2024)

PIMSAB: A Processing-In-Memory System with Spatially-Aware Communication and Bit-Serial-Aware Computation. - Siyuan Ma; Kaustubh Manohar Mhatre; Jian Weng 002; Bagus Hanindhito; Zhengrong Wang; Tony Nowatzki; Lizy K. John; Aman Arora 001 (ACM Trans. Archit. Code Optim., 2024)

NoH: NoC Compilation in High-Level Synthesis. - Huifeng Ke; Sihao Liu; Licheng Guo; Zifan He; Linghao Song; Suhail Basalama; Yuze Chi; Tony Nowatzki; Jason Cong (FCCM, 2025)

NUPEA: Optimizing Critical Loads on Spatial Dataflow Architectures via Non-Uniform Processing-Element Access. - Souradip Ghosh; Graham Gobieski; Keyi Zhang; Brandon Lucia; Nathan Beckmann; Tony Nowatzki (ISCA, 2025)

Cache and Near-Data Co-Design for Chiplets. - Arteen Abrishami; Zhengrong Wang; Tony Nowatzki (IEEE Comput. Archit. Lett., 2025)

Demystifying FPGA Hard NoC Performance. - Sihao Liu; Jake Ke; Tony Nowatzki; Jason Cong (CoRR, 2025)

LLM-DSE: Searching Accelerator Parameters with LLM Agents. - Hanyu Wang; Xinrui Wu; Zijian Ding; Su Zheng; Chengyue Wang 002; Tony Nowatzki; Yizhou Sun; Jason Cong (CoRR, 2025)