Subthreshold logical effort: a systematic framework for optimal subthreshold device sizing. - John Keane 001; Hanyong Eom; Tony Tae-Hyoung Kim; Sachin S. Sapatnekar; Chris H. Kim (DAC, 2006)

An 8T Subthreshold SRAM Cell Utilizing Reverse Short Channel Effect for Write Margin and Read Performance Improvement. - Tony Tae-Hyoung Kim; Jason Liu 004; Chris H. Kim (CICC, 2007)

A High-Density Subthreshold SRAM with Data-Independent Bitline Leakage and Virtual Ground Replica Scheme. - Tony Tae-Hyoung Kim; Jason Liu 004; John Keane 001; Chris H. Kim (ISSCC, 2007)

Utilizing Reverse Short-Channel Effect for Optimal Subthreshold Circuit Design. - Tony Tae-Hyoung Kim; John Keane 001; Hanyong Eom; Chris H. Kim (IEEE Trans. Very Large Scale Integr. Syst., 2007)

A voltage scalable 0.26V, 64kb 8T SRAM with Vmin lowering techniques and deep sleep mode. - Tony Tae-Hyoung Kim; Jason Liu 004; Chris H. Kim (CICC, 2008)

Circuit techniques for ultra-low power subthreshold SRAMs. - Tony Tae-Hyoung Kim; Jason Liu 004; John Keane 001; Chris H. Kim (ISCAS, 2008)

A multi-story power delivery technique for 3D integrated circuits. - Pulkit Jain; Tony Tae-Hyoung Kim; John Keane 001; Chris H. Kim (ISLPED, 2008)

A 0.2 V, 480 kb Subthreshold SRAM With 1 k Cells Per Bitline for Ultra-Low-Voltage Computing. - Tony Tae-Hyoung Kim; Jason Liu 004; John Keane 001; Chris H. Kim (IEEE J. Solid State Circuits, 2008)

Silicon Odometer: An On-Chip Reliability Monitor for Measuring Frequency Degradation of Digital Circuits. - Tony Tae-Hyoung Kim; Randy Persaud; Chris H. Kim (IEEE J. Solid State Circuits, 2008)

Stack Sizing for Optimal Current Drivability in Subthreshold Circuits. - John Keane 001; Hanyong Eom; Tony Tae-Hyoung Kim; Sachin S. Sapatnekar; Chris H. Kim (IEEE Trans. Very Large Scale Integr. Syst., 2008)

An SRAM reliability test macro for fully-automated statistical measurements of Vmin degradation. - Tony Tae-Hyoung Kim; Wei Zhang 032; Chris H. Kim (CICC, 2009)

A Voltage Scalable 0.26 V, 64 kb 8T SRAM With Vmin Lowering Techniques and Deep Sleep Mode. - Tony Tae-Hyoung Kim; Jason Liu 004; Chris H. Kim (IEEE J. Solid State Circuits, 2009)

A 9T subthreshold SRAM bitcell with data-independent bitline leakage for improved bitline swing and variation tolerance. - Qi Li; Tony T. Kim (APCCAS, 2010)

On-chip reliability monitors for measuring circuit degradation. - John Keane 001; Tony Tae-Hyoung Kim; Xiaofei Wang; Chris H. Kim (Microelectron. Reliab., 2010)

An On-Chip NBTI Sensor for Measuring pMOS Threshold Voltage Degradation. - John Keane 001; Tony Tae-Hyoung Kim; Chris H. Kim (IEEE Trans. Very Large Scale Integr. Syst., 2010)

Design of capacitive-coupling-based simultaneously bi-directional transceivers for 3DIC. - Myat Thu Linn Aung; Eric Teck Heng Lim; Takefumi Yoshikawa; Tony Tae-Hyoung Kim (3DIC, 2011)

Impacts of NBTI/PBTI on SRAM VMIN and design techniques for SRAM VMIN improvement. - Tony Tae-Hyoung Kim; Zhi-Hui Kong (ISOCC, 2011)

Analysis of SRAM hierarchical bitlines for optimal performance and variation tolerance. - Qi Li; Tony T. Kim (ISOCC, 2011)

A 5.61 pJ, 16 kb 9T SRAM with single-ended equalized bitlines and fast local write-back for cell stability improvement. - Qi Li; Bo Wang 020; Tony T. Kim (ESSDERC, 2012)

Design of ring oscillator structures for measuring isolated NBTI and PBTI. - Tony T. Kim; Pong-Fei Lu; Chris H. Kim (ISCAS, 2012)

High energy efficient ultra-low voltage SRAM design: Device, circuit, and architecture. - Tony T. Kim; Bo Wang 020; Anh-Tuan Do (ISOCC, 2012)

NBTI/PBTI-aware wordline voltage control with no boosted supply for stability improvement of half-selected SRAM cells. - Zhao Chuan Lee; Kim Ming Ho; Zhi-Hui Kong; Tony T. Kim (ISOCC, 2012)

Design of Simultaneous Bi-Directional Transceivers Utilizing Capacitive Coupling for 3DICs in Face-to-Face Configuration. - Myat Thu Linn Aung; Eric Teck Heng Lim; Takefumi Yoshikawa; Tony Tae-Hyoung Kim (IEEE J. Emerg. Sel. Topics Circuits Syst., 2012)

Sensing Margin Enhancement Techniques for Ultra-Low-Voltage SRAMs Utilizing a Bitline-Boosting Current and Equalized Bitline Leakage. - Anh-Tuan Do; Truc Quynh Nguyen; Kiat Seng Yeo; Tony Tae-Hyoung Kim (IEEE Trans. Circuits Syst. II Express Briefs, 2012)

An SRAM Reliability Test Macro for Fully Automated Statistical Measurements of VMIN Degradation. - Tony Tae-Hyoung Kim; Wei Zhang 032; Chris H. Kim (IEEE Trans. Circuits Syst. I Regul. Pap., 2012)

Design of a power-efficient CAM using automated background checking scheme for small match line swing. - Anh Tuan Do; Chun Yin; Kiat Seng Yeo; Tony Tae-Hyoung Kim (ESSCIRC, 2013)

Design and array implementation a cantilever-based non-volatile memory utilizing vibrational reset. - Anh-Tuan Do; Karthik G. Jayaraman; Pushpapraj Singh; Chua Geng Li; Kiat Seng Yeo; Tony Tae-Hyoung Kim (ESSDERC, 2013)

Design of self-biased fully differential receiver and crosstalk cancellation for capacitive coupled vertical interconnects in 3DICs. - Myat Thu Linn Aung; Eric Teck Heng Lim; Takefumi Yoshikawa; Tony Tae-Hyoung Kim (ISCAS, 2013)

An improved read/write scheme for anchorless NEMS-CMOS non-volatile memory. - Anh-Tuan Do; Karthik G. Jayaraman; Vincent Pott; Chua Geng Li; Pushpapraj Singh; Kiat Seng Yeo; Tony Tae-Hyoung Kim (ISCAS, 2013)

A 0.4V 7T SRAM with write through virtual ground and ultra-fine grain power gating switches. - Yuan Lin Yeoh; Bo Wang 020; Xiangyao Yu; Tony T. Kim (ISCAS, 2013)

A Scaling Roadmap and Performance Evaluation of In-Plane and Perpendicular MTJ Based STT-MRAMs for High-Density Cache Memory. - Ki Chul Chun; Hui Zhao; Jonathan D. Harms; Tony Tae-Hyoung Kim; Jianping Wang 006; Chris H. Kim (IEEE J. Solid State Circuits, 2013)

SRAM Array Structures for Energy Efficiency Enhancement. - Achiranshu Garg; Tony Tae-Hyoung Kim (IEEE Trans. Circuits Syst. II Express Briefs, 2013)

NBTI/PBTI-Aware WWL Voltage Control for Half-Selected Cell Stability Improvement. - Zhao Chuan Lee; Kam Chew Leong; Zhi-Hui Kong; Tony Tae-Hyoung Kim (IEEE Trans. Circuits Syst. II Express Briefs, 2013)

0.2 V 8T SRAM with improved bitline sensing using column-based data randomization. - Anh-Tuan Do; Zhao Chuan Lee; Bo Wang 020; Ik-Joon Chang; Tony Tae-Hyoung Kim (A-SSCC, 2014)

Design of SRAM PUF with improved uniformity and reliability utilizing device aging effect. - Achiranshu Garg; Tony Tae-Hyoung Kim (ISCAS, 2014)

An area- and power-efficient FIFO with error-reduced data compression for image/video processing. - Seyed Mohammad Ali Zeinolabedin; Jun Zhou 017; Xin Liu 015; Tony T. Kim (ISCAS, 2014)

0.77 fJ/bit/search Content Addressable Memory Using Small Match Line Swing and Automated Background Checking Scheme for Variation Tolerance. - Anh-Tuan Do; Chun Yin; Kavitha Velayudhan; Zhao Chuan Lee; Kiat Seng Yeo; Tony Tae-Hyoung Kim (IEEE J. Solid State Circuits, 2014)

Design of a Temperature-Aware Low-Voltage SRAM With Self-Adjustable Sensing Margin Enhancement for High-Temperature Applications up to 300 °C. - Tony Tae-Hyoung Kim; Ngoc Le Ba (IEEE J. Solid State Circuits, 2014)

A 457 nW Near-Threshold Cognitive Multi-Functional ECG Processor for Long-Term Cardiac Monitoring. - Xin Liu 015; Jun Zhou 017; Yongkui Yang; Bo Wang 020; Jingjing Lan; Chao Wang 016; Jianwen Luo; Wang Ling Goh; Tony Tae-Hyoung Kim; Minkyu Je (IEEE J. Solid State Circuits, 2014)

Silicon Odometers: Compact In Situ Aging Sensors for Robust System Design. - Xiaofei Wang; John Keane 001; Tony Tae-Hyoung Kim; Pulkit Jain; Qianying Tang; Chris H. Kim (IEEE Micro, 2014)

A 3-Gb/s/ch Simultaneous Bidirectional Capacitive Coupling Transceiver for 3DICs. - Myat Thu Linn Aung; Eric Teck Heng Lim; Takefumi Yoshikawa; Tony Tae-Hyoung Kim (IEEE Trans. Circuits Syst. II Express Briefs, 2014)

Opportunities and challenges: Ultra-low voltage digital IC design techniques. - Tony T. Kim; Jun Zhou 017; Yong Lian 001 (ASICON, 2015)

A 76% efficiency boost converter with 220mV self-startup and 2nW quiescent power for high resistance thermo-electric energy harvesting. - Abhik Das; Yuan Gao 011; Tony Tae-Hyoung Kim (ESSCIRC, 2015)

A 0.5V power and area efficient Laplacian Pyramid processing engine using FIFO with adaptive data compression. - Seyed Mohammad Ali Zeinolabedin; Jun Zhou 017; Xin Liu 015; Tony T. Kim (ESSCIRC, 2015)

An output feedback-based start-up technique with automatic disabling for battery-less energy harvesters. - Abhik Das; Yuan Gao 011; Tony Tae-Hyoung Kim (ISCAS, 2015)

A 32kb 9T SRAM with PVT-tracking read margin enhancement for ultra-low voltage operation. - Anh-Tuan Do; Kiat Seng Yeo; Tony Tae-Hyoung Kim (ISCAS, 2015)

Design of a hybrid neural spike detection algorithm for implantable integrated brain circuits. - Seyed Mohammad Ali Zeinolabedin; Anh-Tuan Do; Kiat Seng Yeo; Tony Tae-Hyoung Kim (ISCAS, 2015)

SRAM devices and circuits optimization toward energy efficiency in multi-Vth CMOS. - Bo Wang 020; Jun Zhou 017; Tony Tae-Hyoung Kim (Microelectron. J., 2015)

An Ultralow-Voltage Sensor Node Processor With Diverse Hardware Acceleration and Cognitive Sampling for Intelligent Sensing. - Xin Liu 015; Jun Zhou 017; Chao Wang 016; Kah-Hyong Chang; Jianwen Luo; Jingjing Lan; Lei Liao; Yat-Hei Lam; Yongkui Yang; Bo Wang 020; Xin Zhang 025; Wang Ling Goh; et al. (IEEE Trans. Circuits Syst. II Express Briefs, 2015)

Design of an Ultra-low Voltage 9T SRAM With Equalized Bitline Leakage and CAM-Assisted Energy Efficiency Improvement. - Bo Wang 020; Truc Quynh Nguyen; Anh-Tuan Do; Jun Zhou 017; Minkyu Je; Tony Tae-Hyoung Kim (IEEE Trans. Circuits Syst. I Regul. Pap., 2015)

A Ring-Oscillator-Based Reliability Monitor for Isolated Measurement of NBTI and PBTI in High-k/Metal Gate Technology. - Tony Tae-Hyoung Kim; Pong-Fei Lu; Keith A. Jenkins; Chris H. Kim (IEEE Trans. Very Large Scale Integr. Syst., 2015)

An Area- and Energy-Efficient FIFO Design Using Error-Reduced Data Compression and Near-Threshold Operation for Image/Video Applications. - Seyed Mohammad Ali Zeinolabedin; Jun Zhou 017; Xin Liu 015; Tony Tae-Hyoung Kim (IEEE Trans. Very Large Scale Integr. Syst., 2015)

Self-contained built-in-self-test/repair transceivers for interconnects in 3DICs. - Myat Thu Linn Aung; Tony T. Kim (APCCAS, 2016)

A 0.6-V power efficient digital LDO with 99.7% current efficiency utilizing load current aware clock modulation for fast transient response. - Karthik Gopal Jayaraman; Karim Rawy; Tony T. Kim (APCCAS, 2016)

Live demonstration: A 128-channel spike sorting processor featuring 0.175 μW and 0.0033 mm2 per Channel in 65-nm CMOS. - Seyed Mohammad Ali Zeinolabedin; Anh-Tuan Do; Dongsuk Jeon; Dennis Sylvester; Tony Tae-Hyoung Kim (APCCAS, 2016)

An isolated PoR based pulse generator for TEG energy harvesting with minimum startup of 150 mV and maximum series resistance of 600 Ω. - Abhik Das; Yuan Gao 011; Tony T. Kim (A-SSCC, 2016)

A 0.3 pJ/access 8T data-aware SRAM utilizing column-based data encoding for ultra-low power applications. - Anh-Tuan Do; Seyed Mohammad Ali Zeinolabedin; Tony Tae-Hyoung Kim (A-SSCC, 2016)

An 8T SRAM with BTI-Aware Stability Monitor and two-phase write operation for cell stability improvement in 28-nm FDSOI. - Zhao Chuan Lee; M. Sultan M. Siddiqui; Zhi-Hui Kong; Tony Tae-Hyoung Kim (ESSCIRC, 2016)

A 0.3 V, 49 fJ/conv.-step VCO-based delta sigma modulator with self-compensated current reference for variation tolerance. - Neelakantan Narasimman; Tony T. Kim (ESSCIRC, 2016)

A time-based self-adaptive energy-harvesting MPPT with 5.1-µW power consumption and a wide tracking range of 10-µA to 1-mA. - Karim Rawy; Felix Kalathiparambil George; Dominic Maurath; Tony T. Kim (ESSCIRC, 2016)

Area-efficient and low stand-by power 1k-byte transmission-gate-based non-imprinting high-speed erase (TNIHE) SRAM. - Weng-Geng Ho; Kyaw Zwa Lwin Ne; N. Prashanth Srinivas; Kwen-Siong Chong; Tony Tae-Hyoung Kim; Bah-Hwee Gwee (ISCAS, 2016)

An ultra-low voltage, VCO-based ADC with digital background calibration. - Neelakantan Narasimman; Tony T. Kim (ISCAS, 2016)

A 260µW infrared gesture recognition system-on-chip for smart devices. - Sechang Oh 001; Ngoc Le Ba; Suyoung Bang; Junwon Jeong; David T. Blaauw; Tony T. Kim; Dennis Sylvester (VLSI Circuits, 2016)

A 128-channel spike sorting processor featuring 0.175 µW and 0.0033 mm2 per channel in 65-nm CMOS. - Seyed Mohammad Ali Zeinolabedin; Anh-Tuan Do; Dongsuk Jeon; Dennis Sylvester; Tony Tae-Hyoung Kim (VLSI Circuits, 2016)

Structuring of Contourlet Transform for Pipeline-Based Implementation. - Seyed Mohammad Ali Zeinolabedin; Nader Karimi; Shadrokh Samavi; Tony Tae-Hyoung Kim (Circuits Syst. Signal Process., 2016)

0.2 V 8T SRAM With PVT-Aware Bitline Sensing and Column-Based Data Randomization. - Anh-Tuan Do; Zhao Chuan Lee; Bo Wang 020; Ik-Joon Chang; Xin Liu 015; Tony Tae-Hyoung Kim (IEEE J. Solid State Circuits, 2016)

A Power and Area Efficient Ultra-Low Voltage Laplacian Pyramid Processing Engine With Adaptive Data Compression. - Seyed Mohammad Ali Zeinolabedin; Jun Zhou 017; Tony Tae-Hyoung Kim (IEEE Trans. Circuits Syst. I Regul. Pap., 2016)

2.31-Gb/s/ch Area-Efficient Crosstalk Canceled Hybrid Capacitive Coupling Interconnect for 3-D Integration. - Myat Thu Linn Aung; Eric Teck Heng Lim; Takefumi Yoshikawa; Tony Tae-Hyoung Kim (IEEE Trans. Very Large Scale Integr. Syst., 2016)

Read Bitline Sensing and Fast Local Write-Back Techniques in Hierarchical Bitline Architecture for Ultralow-Voltage SRAMs. - Bo Wang 020; Qi Li; Tony Tae-Hyoung Kim (IEEE Trans. Very Large Scale Integr. Syst., 2016)

Near-threshold processor design techniques for power-constrained computing devices. - Jun Zhou 017; Tony Tae-Hyoung Kim; Yong Lian 001 (ASICON, 2017)

An 82% energy-saving change-sensing flip-flop in 40nm CMOS for ultra-low power applications. - Van Loi Le; Juhui Li; Alan Chang; Tony T. Kim (A-SSCC, 2017)

An 88% efficiency MPPT for PV energy harvesting system with novel switch width modulation for output power 100nW to 0.3mW. - Karim Rawy; Taegeun Yoo; Tony T. Kim (A-SSCC, 2017)

A 16kb column-based split cell-VSS, data-aware write-assisted 9T ultra-low voltage SRAM with enhanced read sensing margin in 28nm FDSOI. - M. Sultan M. Siddiqui; Zhao Chuan Lee; Tony Tae-Hyoung Kim (A-SSCC, 2017)

A 1.2 V, 0.84 pJ/conv.-Step ultra-low power capacitance to digital converter for microphone based auscultation. - Neelakantan Narasimman; Dipankar Nag; Kevin Tshun Chuan Chai; Tony T. Kim (CICC, 2017)

Library pruning and sigma corner libraries for power efficient variation tolerant processor pipelines. - Mini Jayakrishnan; Alan Chang; Tony T. Kim (VLSI-SoC, 2017)

A 0.4 V 12T 2RW dual-port SRAM with suppressed common-row-access disturbance. - Bo Wang 020; Jun Zhou 017; Tony Tae-Hyoung Kim (Microelectron. J., 2017)

A 220-mV Power-on-Reset Based Self-Starter With 2-nW Quiescent Power for Thermoelectric Energy Harvesting Systems. - Abhik Das; Yuan Gao 011; Tony Tae-Hyoung Kim (IEEE Trans. Circuits Syst. I Regul. Pap., 2017)

A Self-Adaptive Time-Based MPPT With 96.2% Tracking Efficiency and a Wide Tracking Range of 10 µA to 1 mA for IoT Applications. - Karim Rawy; Felix Kalathiparambil; Dominic Maurath; Tony Tae-Hyoung Kim (IEEE Trans. Circuits Syst. I Regul. Pap., 2017)

Yield Enhancement of Face-to-Face Cu-Cu Bonding With Dual-Mode Transceivers in 3DICs. - Myat Thu Linn Aung; Takefumi Yoshikawa; Chuan Seng Tan; Tony Tae-Hyoung Kim (IEEE Trans. Very Large Scale Integr. Syst., 2017)

Design of Temperature-Aware Low-Voltage 8T SRAM in SOI Technology for High-Temperature Operation (25 %C-300 %C). - Ngoc Le Ba; Tony Tae-Hyoung Kim (IEEE Trans. Very Large Scale Integr. Syst., 2017)

An Ultra-low Power 8T SRAM with Vertical Read Word Line and Data Aware Write Assist. - Lu Lu 013; Taegeun Yoo; Van Loi Le; Tony Tae-Hyoung Kim (A-SSCC, 2018)

An 88% Efficiency 2.4μW to 15.6μW Triboelectric Nanogenerator Energy Harvesting System Based on a Single-Comparator Control Algorithm. - Karim Rawy; Ruchi Sharma; Hong-Joon Yoon; Usman Khan; Sang-Woo Kim; Tony T. Kim (A-SSCC, 2018)

A 137-μW Area-Efficient Real-Time Gesture Recognition System for Smart Wearable Devices. - Taegeun Yoo; Van Loi Le; Ju Eon Kim; Ngoc Le Ba; Kwang-Hyun Baek; Tony T. Kim (A-SSCC, 2018)

Leakage Control System Using Data Estimation of Resistive Memory. - JunYoung Kweon; JunTae Choi; Yun-Heup Song; Tony Tae-Hyoung Kim (ISOCC, 2018)

Experimental Verification of a Simple, Intuitive, and Accurate Closed-Form Transfer Function Model for Diverse High-Speed Interconnects. - Kyunghyun Lim; Minsoo Choi 002; Myat Thu Linn Aung; Kyunghwan Kim; Ji-Seong Kim; Rock-Hyun Baek; Ho-Jin Song; Tony Tae-Hyoung Kim; Byungsub Kim (ISOCC, 2018)

A Radiation Hardened SRAM with Self-refresh and Compact Error Correction. - M. Sultan M. Siddiqui; Ruchi Sharma; Van Loi Le; Taegeun Yoo; Ik-Joon Chang; Tony Tae-Hyoung Kim (ISOCC, 2018)

A 0.4-V, 0.138-fJ/Cycle Single-Phase-Clocking Redundant-Transition-Free 24T Flip-Flop With Change-Sensing Scheme in 40-nm CMOS. - Van Loi Le; Juhui Li; Alan Chang; Tony Tae-Hyoung Kim (IEEE J. Solid State Circuits, 2018)

An 88% Efficiency 0.1-300-µW Energy Harvesting System With 3-D MPPT Using Switch Width Modulation for IoT Smart Nodes. - Karim Rawy; Taegeun Yoo; Tony Tae-Hyoung Kim (IEEE J. Solid State Circuits, 2018)

An Area Efficient 1024-Point Low Power Radix-22 FFT Processor With Feed-Forward Multiple Delay Commutators. - Ngoc Le Ba; Tony Tae-Hyoung Kim (IEEE Trans. Circuits Syst. I Regul. Pap., 2018)

A 12-bit Multi-Channel R-R DAC Using a Shared Resistor String Scheme for Area-Efficient Display Source Driver. - Dong-Kyu Jung; Yun-Hwan Jung; Taegeun Yoo; Dong-Hyun Yoon; Bo-Yun Jung; Tony Tae-Hyoung Kim; Kwang-Hyun Baek (IEEE Trans. Circuits Syst. I Regul. Pap., 2018)

An Area and Energy Efficient Ultra-Low Voltage Level Shifter With Pass Transistor and Reduced-Swing Output Buffer in 65-nm CMOS. - Van Loi Le; Tony Tae-Hyoung Kim (IEEE Trans. Circuits Syst. II Express Briefs, 2018)

Continuous wave laser excitation based portable optoacoustic imaging system for melanoma detection. - Siyu Liu 001; Kai Tang 002; Haoran Jin; Ruochong Zhang; Tony Tae-Hyoung Kim; Yuanjin Zheng (BioCAS, 2019)

Novel current-mirror based time dependent sense scheme for MLC PRAM. - JunTae Choi; JunYoung Kweon; YunHeub Song; Tony Tae-Hyoung Kim (ICEIC, 2019)

A 1-16b Precision Reconfigurable Digital In-Memory Computing Macro Featuring Column-MAC Architecture and Bit-Serial Computation. - Hyunjoon Kim; Qian Chen 027; Taegeun Yoo; Tony Tae-Hyoung Kim; Bongjin Kim (ESSCIRC, 2019)

A 213.7-µW Gesture Sensing System-On-Chip With Self-Adaptive Motion Detection and Noise-Tolerant Outermost-Edge-Based Feature Extraction in 65 nm. - Van Loi Le; Taegeun Yoo; Ju Eon Kim; Kwang-Hyun Baek; Tony Tae-Hyoung Kim (ESSCIRC, 2019)

A Sequence-Dependent Configurable PUF Based on 6T SRAM for Enhanced Challenge Response Space. - Lu Lu 013; Tony Tae-Hyoung Kim (ISCAS, 2019)

A Logic Compatible 4T Dual Embedded DRAM Array for In-Memory Computation of Deep Neural Networks. - Taegeun Yoo; Hyunjoon Kim; Qian Chen 027; Tony Tae-Hyoung Kim; Bongjin Kim (ISLPED, 2019)

Overview of Memory Design for Next Generation Applications. - Tony Tae-Hyoung Kim (ISOCC, 2019)

A Bit-Precision Reconfigurable Digital In-Memory Computing Macro for Energy-Efficient Processing of Artificial Neural Networks. - Hyunjoon Kim; Qian Chen 027; Taegeun Yoo; Tony Tae-Hyoung Kim; Bongjin Kim (ISOCC, 2019)

Modelling of Phase Change Memory(PCM) cell for Circuit Simulation. - JunYoung Kweon; Yun-Heup Song; Tony Tae-Hyoung Kim (ISOCC, 2019)

Tutorial 1A: Design of ultra-low power SRAM for IoT, security and computation-in-memory. - Tony Tae-Hyoung Kim (SoCC, 2019)

An 8T SRAM With On-Chip Dynamic Reliability Management and Two-Phase Write Operation in 28-nm FDSOI. - Zhao Chuan Lee; M. Sultan M. Siddiqui; Zhi-Hui Kong; Tony Tae-Hyoung Kim (IEEE J. Solid State Circuits, 2019)

A 256 pixel, 21.6 μW infrared gesture recognition processor for smart devices. - Ngoc Le Ba; Sechang Oh 001; Dennis Sylvester; Tony Tae-Hyoung Kim (Microelectron. J., 2019)

Improving uniformity and reliability of SRAM PUFs utilizing device aging phenomenon for unique identifier generation. - Achiranshu Garg; Zhao Chuan Lee; Lu Lu 013; Tony Tae-Hyoung Kim (Microelectron. J., 2019)

A Secure Data-Toggling SRAM for Confidential Data Protection. - Weng-Geng Ho; Kwen-Siong Chong; Tony Tae-Hyoung Kim; Bah-Hwee Gwee (IEEE Trans. Circuits Syst. I Regul. Pap., 2019)

Editorial TVLSI Positioning - Continuing and Accelerating an Upward Trajectory. - Massimo Alioto; Magdy S. Abadir; Tughrul Arslan; Chirn Chye Boon; Andreas Burg 001; Chip-Hong Chang; Meng-Fan Chang; Yao-Wen Chang; Poki Chen; Pasquale Corsonello; Paolo Crovetti; Shiro Dosho; et al. (IEEE Trans. Very Large Scale Integr. Syst., 2019)

An Area-Efficient 128-Channel Spike Sorting Processor for Real-Time Neural Recording With 0.175µW/Channel in 65-nm CMOS. - Anh-Tuan Do; Seyed Mohammad Ali Zeinolabedin; Dongsuk Jeon; Dennis Sylvester; Tony Tae-Hyoung Kim (IEEE Trans. Very Large Scale Integr. Syst., 2019)

ReRAM Device and Circuit Co-Design Challenges in Nano-scale CMOS Technology. - Lu Lu 013; Ju Eon Kim; Vishal Sharma 004; Tony Tae-Hyoung Kim (APCCAS, 2020)

A 16K Current-Based 8T SRAM Compute-In-Memory Macro with Decoupled Read/Write and 1-5bit Column ADC. - Chengshuo Yu; Taegeun Yoo; Tony Tae-Hyoung Kim; Kevin Tshun Chuan Chai; Bongjin Kim (CICC, 2020)

A 16×128 Stochastic-Binary Processing Element Array for Accelerating Stochastic Dot-Product Computation Using 1-16 Bit-Stream Length. - Qian Chen 027; Yuqi Su; Hyunjoon Kim; Taegeun Yoo; Tony Tae-Hyoung Kim; Bongjin Kim (DATE, 2020)

Reconfigurable 2T2R ReRAM with Split Word-Lines for TCAM Operation and In-Memory Computing. - Yuzong Chen 001; Lu Lu 013; Bongjin Kim; Tony Tae-Hyoung Kim (ISCAS, 2020)

Design and Characterization of Radiation-Hardened MCU for Space Application using Error Correction SRAM and Glitch Removal Clock Buffer Cell. - Anh Tuan Do; Tony Tae-Hyoung Kim; Xin Liu 015; Jun Zhou 017 (ISCAS, 2020)

A Low-Power Smart Gesture Sensing SoC with On-chip Image Sensor for Smart Devices. - Van Loi Le; Taegeun Yoo; Ju Eon Kim; Kwang-Hyun Baek; Tony Tae-Hyoung Kim (ISOCC, 2020)

Design of Current-Mode 8T SRAM Compute-In-Memory Macro for Processing Neural Networks. - Taegeun Yoo; Tony Tae-Hyoung Kim; Bongjin Kim; Chengshuo Yu; Kevin Chai Tshun Chuan (ISOCC, 2020)

A 0.5 V 8-12 Bit 300 KSPS SAR ADC With Adaptive Conversion Time Detection-and-Control for High Immunity to PVT Variations. - Ju Eon Kim; Taegeun Yoo; Dong-Kyu Jung; Dong-Hyun Yoon; Kiho Seong; Tony Tae-Hyoung Kim; Kwang-Hyun Baek (IEEE Access, 2020)

Time-Interleaved SAR ADC with Background Timing-Skew Calibration for UWB Wireless Communication in IoT Systems. - Kiho Seong; Dong-Kyu Jung; Dong-Hyun Yoon; Jae-Soub Han; Ju Eon Kim; Tony Tae-Hyoung Kim; Woojoo Lee; Kwang-Hyun Baek (Sensors, 2020)

Development of a Handheld Volumetric Photoacoustic Imaging System With a Central-Holed 2D Matrix Aperture. - Siyu Liu 001; Weitao Song; Xinqin Liao; Tony Tae-Hyoung Kim; Yuanjin Zheng (IEEE Trans. Biomed. Eng., 2020)

Energy-Efficient Data-Aware SRAM Design Utilizing Column-Based Data Encoding. - Anh-Tuan Do; Seyed Mohammad Ali Zeinolabedin; Tony Tae-Hyoung Kim (IEEE Trans. Circuits Syst. II Express Briefs, 2020)

Reconfigurable 2T2R ReRAM Architecture for Versatile Data Storage and Computing In-Memory. - Yuzong Chen 001; Lu Lu 013; Bongjin Kim; Tony Tae-Hyoung Kim (IEEE Trans. Very Large Scale Integr. Syst., 2020)

A 137-μW 1.78-mm2 30-Frames/s Real-Time Gesture Recognition SoC for Smart Devices. - Van Loi Le; Taegeun Yoo; Ju Eon Kim; Ngoc Le Ba; Kwang-Hyun Baek; Tony Tae-Hyoung Kim (IEEE Trans. Very Large Scale Integr. Syst., 2020)

A 0.506-pJ 16-kb 8T SRAM With Vertical Read Wordlines and Selective Dual Split Power Lines. - Lu Lu 013; Taegeun Yoo; Van Loi Le; Tony Tae-Hyoung Kim (IEEE Trans. Very Large Scale Integr. Syst., 2020)

An Ultra-Low-power Real-Time Hand-Gesture Recognition System for Edge Applications. - Yuncheng Lu; Zehao Li; Tony Tae-Hyoung Kim (AICAS, 2021)

A Programmable 6T SRAM-Based PUF with Dynamic Stability Data Masking. - Lu Lu 013; Tony Tae-Hyoung Kim (A-SSCC, 2021)

A 3.2 GHz 178fsrms Jitter Injection Locked Clock Multiplier Using Sub-Sampling FTL and DLL for In-Band Noise Improvement. - Dong-Hyun Yoon; Dong-Kyu Jung; Kiho Seong; Tae-Hyeok Eom; Jae-Soub Han; Ju Eon Kim; Tony Tae-Hyoung Kim; Kwang-Hyun Baek (A-SSCC, 2021)

A 0.6-to-1.2 V Scaling Friendly Discrete-Time OTA-Free ΔΣ-ADC for IoT Applications. - Kyung-Chan An; Neelakantan Narasimman; Tony Tae-Hyoung Kim (ESSCIRC, 2021)

A Zero-Skipping Reconfigurable SRAM In-Memory Computing Macro with Binary-Searching ADC. - Chengshuo Yu; Kevin Tshun Chuan Chai; Tony Tae-Hyoung Kim; Bongjin Kim (ESSDERC, 2021)

A Multi-Functional 4T2R ReRAM Macro Enabling 2-Dimensional Access and Computing In-Memory. - Yuzong Chen 001; Lu Lu 013; Yuncheng Lu; Tony Tae-Hyoung Kim (ISCAS, 2021)

A Configurable Randomness Enhanced RRAM PUF with Biased Current Sensing Scheme. - Lu Lu 013; Yuzong Chen 001; Tony Tae-Hyoung Kim (ISCAS, 2021)

AND8T SRAM Macro with Improved Linearity for Multi-Bit In-Memory Computing. - Vishal Sharma 004; Ju Eon Kim; Yong-Jun Jo; Yuzong Chen 001; Tony Tae-Hyoung Kim (ISCAS, 2021)

9.7 A 184 µ W Real-Time Hand-Gesture Recognition System with Hybrid Tiny Classifiers for Smart Wearable Devices. - Yuncheng Lu; Van Loi Le; Tony Tae-Hyoung Kim (ISSCC, 2021)

An Ultra-Low-Voltage VCO-Based ΔΣ Modulator Using Self-compensated Current Reference for Variation Tolerance. - Neelakantan Narasimman; Tony Tae-Hyoung Kim (Circuits Syst. Signal Process., 2021)

Colonnade: A Reconfigurable SRAM-Based Digital Bit-Serial Compute-In-Memory Macro for Processing Neural Networks. - Hyunjoon Kim; Taegeun Yoo; Tony Tae-Hyoung Kim; Bongjin Kim (IEEE J. Solid State Circuits, 2021)

A Reconfigurable 4T2R ReRAM Computing In-Memory Macro for Efficient Edge Applications. - Yuzong Chen 001; Lu Lu 013; Bongjin Kim; Tony Tae-Hyoung Kim (IEEE Open J. Circuits Syst., 2021)

A Reference-Sampling Based Calibration-Free Fractional-N PLL with a PI-Linked Sampling Clock Generator. - Jae-Soub Han; Tae-Hyeok Eom; Seong-Wook Choi; Kiho Seong; Dong-Hyun Yoon; Tony Tae-Hyoung Kim; Kwang-Hyun Baek; Yong Shim (Sensors, 2021)

Guest Editorial Special Issue on Selected Papers From ISCAS 2021. - Deepu John; Tony Tae-Hyoung Kim; Matthew L. Johnston (IEEE Trans. Biomed. Circuits Syst., 2021)

A Logic-Compatible eDRAM Compute-In-Memory With Embedded ADCs for Processing Neural Networks. - Chengshuo Yu; Taegeun Yoo; Hyunjoon Kim; Tony Tae-Hyoung Kim; Kevin Chai Tshun Chuan; Bongjin Kim (IEEE Trans. Circuits Syst. I Regul. Pap., 2021)

A Power-Aware Toggling-Frequency Actuator in Data-Toggling SRAM for Secure Data Protection. - Weng-Geng Ho; Kwen-Siong Chong; Tony Tae-Hyoung Kim; Bah-Hwee Gwee (IEEE Trans. Circuits Syst. II Express Briefs, 2021)

A 0.007 mm2 0.6 V 6 MS/s Low-Power Double Rail-to-Rail SAR ADC in 65-nm CMOS. - Yong-Jun Jo; Ju Eon Kim; Kwang-Hyun Baek; Tony Tae-Hyoung Kim (IEEE Trans. Circuits Syst. II Express Briefs, 2021)

A 16-kb 9T Ultralow-Voltage SRAM With Column-Based Split Cell-VSS, Data-Aware Write-Assist, and Enhanced Read Sensing Margin in 28-nm FDSOI. - M. Sultan M. Siddiqui; Zhao Chuan Lee; Tony Tae-Hyoung Kim (IEEE Trans. Very Large Scale Integr. Syst., 2021)

A 181µW Real-Time 3-D Hand-Gesture Recognition System for Edge Applications. - Yuncheng Lu; Zehao Li; Xin Zhang 025; Tony Tae-Hyoung Kim (AICAS, 2022)

A 181µW Real-Time 3-D Hand Gesture Recognition System based on Bi-directional Convolution and Computing-Efficient Feature Clustering. - Yuncheng Lu; Zehao Li; Yuzong Chen 001; Tony Tae-Hyoung Kim (CICC, 2022)

A Scalable Bit-Serial Computing Hardware Accelerator for Solving 2D/3D Partial Differential Equations Using Finite Difference Method. - Junjie Mu; Chengshuo Yu; Tony Tae-Hyoung Kim; Bongjin Kim (ESSCIRC, 2022)

A 2.5 GHz 104 mW 57.35 dBc SFDR Non-linear DAC-based Direct-Digital Frequency Synthesizer in 65 nm CMOS Process. - Dong-Hyun Yoon; Kwang-Hyun Baek; Tony Tae-Hyoung Kim (ESSCIRC, 2022)

A Reconfigurable 8T SRAM Macro for Bit-Parallel Searching and Computing In-Memory. - Yuzong Chen 001; Junjie Mu; Hyunjoon Kim; Lu Lu 013; Tony Tae-Hyoung Kim (ISCAS, 2022)

A Low-Power Gesture Recognition System utilizing Hybrid Tiny Classifiers. - Yuncheng Lu; Zehao Li; Xin Zhang 025; Tony Tae-Hyoung Kim (ISOCC, 2022)

FlexSpin: A Scalable CMOS Ising Machine with 256 Flexible Spin Processing Elements for Solving Complex Combinatorial Optimization Problems. - Yuqi Su; Tony Tae-Hyoung Kim; Bongjin Kim (ISSCC, 2022)

Guest Editorial Revolution of AI and Machine Learning With Processing-in-Memory (PIM): From Systems, Architectures, to Circuits. - Tony Tae-Hyoung Kim; Bongjin Kim; Joo-Young Kim 001; Jaydeep P. Kulkarni (IEEE J. Emerg. Sel. Topics Circuits Syst., 2022)

An Overview of Processing-in-Memory Circuits for Artificial Intelligence and Machine Learning. - Donghyuk Kim; Chengshuo Yu; Shanshan Xie; Yuzong Chen 001; Joo-Young Kim 001; Bongjin Kim; Jaydeep P. Kulkarni; Tony Tae-Hyoung Kim (IEEE J. Emerg. Sel. Topics Circuits Syst., 2022)

A Reconfigurable 16Kb AND8T SRAM Macro With Improved Linearity for Multibit Compute-In Memory of Artificial Intelligence Edge Devices. - Vishal Sharma 004; Ju Eon Kim; Hyunjoon Kim; Lu Lu 013; Tony Tae-Hyoung Kim (IEEE J. Emerg. Sel. Topics Circuits Syst., 2022)

A 65-nm 8T SRAM Compute-in-Memory Macro With Column ADCs for Processing Neural Networks. - Chengshuo Yu; Taegeun Yoo; Kevin Tshun Chuan Chai; Tony Tae-Hyoung Kim; Bongjin Kim (IEEE J. Solid State Circuits, 2022)

A 6T SRAM Based Two-Dimensional Configurable Challenge-Response PUF for Portable Devices. - Lu Lu 013; Taegeun Yoo; Tony Tae-Hyoung Kim (IEEE Trans. Circuits Syst. I Regul. Pap., 2022)

A 64 Kb Reconfigurable Full-Precision Digital ReRAM-Based Compute-In-Memory for Artificial Intelligence Applications. - Vishal Sharma 004; Hyunjoon Kim; Tony Tae-Hyoung Kim (IEEE Trans. Circuits Syst. I Regul. Pap., 2022)

A High Reliable SRAM-Based PUF With Enhanced Challenge-Response Space. - Lu Lu 013; Tony Tae-Hyoung Kim (IEEE Trans. Circuits Syst. II Express Briefs, 2022)

A 3.2-GHz 178-fsrms Jitter Subsampling PLL/DLL-Based Injection-Locked Clock Multiplier. - Dong-Hyun Yoon; Dong-Kyu Jung; Kiho Seong; Jae-Soub Han; Keun-Yong Chung; Ju Eon Kim; Tony Tae-Hyoung Kim; Kwang-Hyun Baek (IEEE Trans. Very Large Scale Integr. Syst., 2022)

SESOMP: A Scalable and Energy-Efficient Self-Organizing Map Processor with Computing-In-Memory and Dead Neuron Pruning. - Yuncheng Lu; Xin Zhang 025; Zehao Li; Bo Wang 020; Tony Tae-Hyoung Kim (A-SSCC, 2023)

A Time-Based PAM-4 Transceiver Using Single Path Decoder and Fast-Stochastic Calibration Techniques. - Dong-Hyun Yoon; He Junsen; Kwang-Hyun Baek; Youngdon Choi; Jung-Hwan Choi; Tony Tae-Hyoung Kim (A-SSCC, 2023)

A 400MHz 249.1TOPS/W 64Kb Fully-Reconfigurable SRAM-Based Digital Compute-in-Memory Macro for Accelerating CNNs. - Xin Zhang 025; Vishal Sharma 004; Yuncheng Lu; Yong-Jun Jo; Tony Tae-Hyoung Kim (A-SSCC, 2023)

DenseCIM: Binary Weighted-Capacitor SRAM Computation-In-Memory with Column-by-Column Dynamic Range Calibration SAR ADC. - Yong-Jun Jo; Boon Peng Yap; Dong-Hyun Yoon; Hyunjoon Kim; Yuanjin Zheng; Tony Tae-Hyoung Kim (CICC, 2023)

A Reconfigurable lsing Machine for Boolean Satisfiability Problems Featuring Many-Body Spin Interactions. - Yuqi Su; Tony Tae-Hyoung Kim; Bongjin Kim (CICC, 2023)

A Continuous-Time Ising Machine using Coupled Inverter Chains Featuring Fully-Parallel One-Shot Spin Updates. - Chengshuo Yu; Junjie Mu; Kevin Tshun-Chuan Chai; Tony T. Kim; Bongjin Kim (CICC, 2023)

An Effective Faulty TSV Detection Scheme for TSVs in High Bandwidth Memory. - He Junsen; Dong-Hyun Yoon; Tony Tae-Hyoung Kim (ISCAS, 2023)

A Graph-Based Accelerator of Retinex Model with Bit-Serial Computing for Image Processing. - Zhengzhe Wei; Junjie Mu; Zhongzhiguang Lu; Yuanjin Zheng; Tony Tae-Hyoung Kim; Bongjin Kim (ISCAS, 2023)

282-to-607 TOPS/W, 7T-SRAM Based CiM with Reconfigurable Column SAR ADC for Neural Network Processing. - Qibang Zang; Wang Ling Goh; Lu Lu 013; Chengshuo Yu; Junjie Mu; Tony Tae-Hyoung Kim; Bongjin Kim; Dongrui Li; Anh Tuan Do (ISCAS, 2023)

Design of a Current Sense Amplifier with Dynamic Reference for Reliable Resistive Memory. - Byung-Kwon An; Xueyong Zhang; Anh Tuan Do; Tony Tae-Hyoung Kim (NEWCAS, 2023)

A Bit-Serial Computing Accelerator for Solving Coupled Partial Differential Equations. - Junjie Mu; Chengshuo Yu; Tony Tae-Hyoung Kim; Bongjin Kim (VLSI Technology and Circuits, 2023)

A Time-Domain Wavefront Computing Accelerator With a 32 × 32 Reconfigurable PE Array. - Chengshuo Yu; Junjie Mu; Yuqi Su; Kevin Tshun Chuan Chai; Tony Tae-Hyoung Kim; Bongjin Kim (IEEE J. Solid State Circuits, 2023)

A Robust Time-Based Multi-Level Sensing Circuit for Resistive Memory. - Xueyong Zhang; Byung-Kwon An; Tony Tae-Hyoung Kim (IEEE Trans. Circuits Syst. I Regul. Pap., 2023)

A 184-μW Error-Tolerant Real-Time Hand Gesture Recognition System With Hybrid Tiny Classifiers Utilizing Edge CNN. - Yuncheng Lu; Van Loi Le; Tony Tae-Hyoung Kim (IEEE J. Solid State Circuits, 2023)

A 1-16b Reconfigurable 80Kb 7T SRAM-Based Digital Near-Memory Computing Macro for Processing Neural Networks. - Hyunjoon Kim; Junjie Mu; Chengshuo Yu; Tony Tae-Hyoung Kim; Bongjin Kim (IEEE Trans. Circuits Syst. I Regul. Pap., 2023)

BP-SCIM: A Reconfigurable 8T SRAM Macro for Bit-Parallel Searching and Computing In-Memory. - Yuzong Chen 001; Junjie Mu; Hyunjoon Kim; Lu Lu 013; Tony Tae-Hyoung Kim (IEEE Trans. Circuits Syst. I Regul. Pap., 2023)

A Digital Bit-Reconfigurable Versatile Compute-In-Memory Macro for Machine Learning Acceleration. - Xin Zhang 025; Yuncheng Lu; Bo Wang 020; Tony Tae-Hyoung Kim (IEEE Trans. Circuits Syst. II Express Briefs, 2023)

Reference-Free Dual-Mode Cell-to-Cell Sensing for Area-Efficient Resistive Memory. - Byung-Kwon An; Tony Tae-Hyoung Kim (APCCAS, 2024)

Similarity-Aware Transposable SRAM Computation-In-Memory with Pulse-Based SAR ADC. - Yong-Jun Jo; Chufeng Yang; Yuanjin Zheng; Tony Tae-Hyoung Kim (A-SSCC, 2024)

A 1.12nJ/Pixel High-Accuracy and Memory-Efficient Real-Time Object Detection Processor for Neuromorphic Vision Sensors. - Zehao Li; Wenhao Lu; Yuncheng Lu; Junying Li; Yucen Shi; Yuanjin Zheng; Tony Tae-Hyoung Kim (A-SSCC, 2024)

A Real-Time Event Vision Sensor based Object Detection and Tracking System for Edge Applications. - Yuncheng Lu; Yucen Shi; Zehao Li; Junying Li; Tony Tae-Hyoung Kim (A-SSCC, 2024)

ROC-Spin: A 28nm 2, 000 Ring-Oscillator-Collapse Spins for Solving Combinatorial Optimization Problems. - Yuqi Su; Anh Tuan Do; Tony Tae-Hyoung Kim; Bongjin Kim (A-SSCC, 2024)

A 280.580 μm2/Grid, 30.7pJ TMRA-PIM (Time-Multiplexed Random-Access Processing-in-Memory) Programmable Accelerator for Partial Differential Equations Solving and Edge Processing. - Zhengzhe Wei; Yuqi Su; Tony Tae-Hyoung Kim; Yuanjin Zheng (A-SSCC, 2024)

A 10.5 Gbps 0.55 pJ/bit PAM-3 Transceiver Using a Self-driven Dual TIA Receiver and Floating Impedance Matching for Parallel On-chip Transmission Lines. - Dong-Hyun Yoon; Junsen He; Kwang-Hyun Baek; Youngdon Choi; Jung-Hwan Choi; Tony Tae-Hyoung Kim (A-SSCC, 2024)

A 4.2pJ/Pixel 480 fps Stereo Vision Processor with Pixel Level Pipelined Architecture and Two-Path Aggregation Semi-Global Matching. - Zehao Li; Yuncheng Lu; Anh Tuan Do; Tony Tae-Hyoung Kim (CICC, 2024)

A Dynamic Gesture Recognition Algorithm Using Single Halide Perovskite Photovoltaic Cell for Human-Machine Interaction. - Kyung-Chan An; Jun-Ying Li; Chufeng Yang; Si En Timothy Ng; Shibi Varku; Qinjie Wu; Priyanka Kajal; Nripan Mathews; Arindam Basu; Tony Tae-Hyoung Kim (ICEIC, 2024)

Time-based Sensing with Linear Current-to-Time Conversion for Multi-level Resistive Memory. - Byung-Kwon An; Xueyong Zhang; Anh Tuan Do; Tony Tae-Hyoung Kim (ISCAS, 2024)

Live Demonstration: Real-Time Object Detection & Classification System in IoT with Dynamic Neuromorphic Vision Sensors. - Zehao Li; Wenhao Lu; Yuncheng Lu; Junying Li; Yucen Shi; Yuanjin Zheng; Tony Tae-Hyoung Kim (ISCAS, 2024)

An Energy-Efficient Object Detection System in IoT with Dynamic Neuromorphic Vision Sensors. - Zehao Li; Wenhao Lu; Yuncheng Lu; Junying Li; Yucen Shi; Yuanjin Zheng; Tony Tae-Hyoung Kim (ISCAS, 2024)

A Memory-Efficient High-Speed Event-based Object Tracking System. - Yuncheng Lu; Kaixiang Cui; Yucen Shi; Zehao Li; Junying Li; Wenhao Lu; Yuanjin Zheng; Tony Tae-Hyoung Kim (ISCAS, 2024)

A 2.793µW Near-Threshold Neuronal Population Dynamics Simulator for Reliable Simultaneous Localization and Mapping. - Zhengzhe Wei; Boyi Dong; Yuqi Su; Yi Wang 016; Chuanshi Yang; Yuncheng Lu; Chao Wang 016; Tony Tae-Hyoung Kim; Yuanjin Zheng (ISCAS, 2024)

Event-frame object detection under dynamic background condition. - Wenhao Lu; Zehao Li; Junying Li; Yuncheng Lu; Tony Tae-Hyoung Kim (J. Electronic Imaging, 2024)

A 0.6-to-1.2 V Scaling-Friendly Discrete-Time OTA-Free Linear VCO-Based ΔΣ ADC Suitable for DVFS. - Kyung-Chan An; Neelakantan Narasimman; Tony Tae-Hyoung Kim (IEEE Trans. Circuits Syst. I Regul. Pap., 2024)

A 1-Mb RRAM Macro With 9.8 ns Read Access Time Utilizing Dynamic Reference Voltage for Reliable Sensing Operation. - Junjie Mu; Lu Lu 013; Ju Eon Kim; Byung-Kwon An; Vishal Sharma 004; Arya Jagath Lekshmi; Putu Andhita Dananjaya; Weng Hong Lai; Wen Siang Lew; Tony Tae-Hyoung Kim (IEEE Trans. Circuits Syst. II Express Briefs, 2024)

HGRP: A 181-μ W Real-Time Hand Gesture Recognition Processor Based on Bi-Directional Convolution and Iteration-Free Feature Clustering. - Yuncheng Lu; Zehao Li; Tony Tae-Hyoung Kim (IEEE J. Solid State Circuits, 2024)

A Reconfigurable Step-Down Switched-Capacitor Power Converter Using Optimized Partial Series-Parallel (OPSP) Topology. - Chung-Hee Jang; Dong-Hyun Shin; Young-Kyu Kim; Tony Tae-Hyoung Kim; Sukho Lee; Kwang-Hyun Baek (IEEE Trans. Circuits Syst. II Express Briefs, 2024)

A 2.5-GHz Dynamic Performance-Enhanced Nonlinear DAC-Based Direct-Digital Frequency Synthesizer in 65-nm CMOS Process. - Dong-Hyun Yoon; Kwang-Hyun Baek; Tony Tae-Hyoung Kim (IEEE J. Solid State Circuits, 2024)

A Scalable and Reconfigurable Bit-Serial Compute-Near-Memory Hardware Accelerator for Solving 2-D/3-D Partial Differential Equations. - Junjie Mu; Chengshuo Yu; Tony Tae-Hyoung Kim; Bongjin Kim (IEEE J. Solid State Circuits, 2024)

FlexSpin: A CMOS Ising Machine With 256 Flexible Spin Processing Elements With 8-b Coefficients for Solving Combinatorial Optimization Problems. - Yuqi Su; Tony Tae-Hyoung Kim; Bongjin Kim (IEEE J. Solid State Circuits, 2024)

A Dual 7T SRAM-Based Zero-Skipping Compute- In-Memory Macro With 1-6b Binary Searching ADCs for Processing Quantized Neural Networks. - Chengshuo Yu; Haoge Jiang; Junjie Mu; Kevin Tshun Chuan Chai; Tony Tae-Hyoung Kim; Bongjin Kim (IEEE Trans. Circuits Syst. I Regul. Pap., 2024)

An Inductance-Variation-Insensitive Buck Converter Using a Dynamic Ramp Compensation With Slope Sensing Technique. - Dong-Hyun Shin; Chung-Hee Jang; Young-Kyu Kim; Tony Tae-Hyoung Kim; Sukho Lee; Kwang-Hyun Baek (IEEE Trans. Circuits Syst. II Express Briefs, 2024)

A High-Resolution Discrete-Time Second-Order ΣΔ ADC with Improved Tolerance to KT/C Noise Using Low Oversampling Ratio. - Kyung-Chan An; Neelakantan Narasimman; Tony Tae-Hyoung Kim (Sensors, 2024)

A 1Mb RRAM Macro with Bipolar Forming for Improved Programming Yield and Cell-by-cell Write Verification Scheme. - Byungkwon An; Junjie Mu; Putu Andhita Dananjaya; Weng Hong Lai; Wen Siang Lew; Tony Tae-Hyoung Kim (ISCAS, 2025)

A 2.793 μW Near-Threshold Neuronal Population Dynamics Trajectory Filter for Reliable Simultaneous Localization and Mapping. - Zhengzhe Wei; Boyi Dong; Yuqi Su; Yi Wang 016; Chuanshi Yang; Yuncheng Lu; Chao Wang 096; Tony Tae-Hyoung Kim; Yuanjin Zheng (IEEE Trans. Circuits Syst. I Regul. Pap., 2025)

A Graph-Based Accelerator of Retinex Model With Bit-Serial Computing for Image Enhancements. - Zhengzhe Wei; Junjie Mu; Yuanjin Zheng; Tony Tae-Hyoung Kim; Bongjin Kim (IEEE Trans. Circuits Syst. I Regul. Pap., 2025)

SESOMP: A Scalable and Energy-Efficient Self-Organizing Map Processor for IoT Devices. - Yuncheng Lu; Xin Zhang 025; Bo Wang 020; Tony Tae-Hyoung Kim (IEEE J. Solid State Circuits, 2025)

A 65-nm 55.8-TOPS/W Compact 2T eDRAM-Based Compute-in-Memory Macro With Linear Calibration. - Xueyong Zhang; Yong-Jun Jo; Tony Tae-Hyoung Kim (IEEE Trans. Very Large Scale Integr. Syst., 2025)