Embedded ISA support for enhanced floating-point to fixed-point ANSI-C compilation. - Tor M. Aamodt; Paul Chow (CASES, 2000)

A framework for modeling and optimization of prescient instruction prefetch. - Tor M. Aamodt; Pedro Marcuello; Paul Chow; Antonio González 001; Per Hammarlund; Hong Wang 003; John Paul Shen (SIGMETRICS, 2003)

Hardware Support for Prescient Instruction Prefetch. - Tor M. Aamodt; Paul Chow; Per Hammarlund; Hong Wang 003; John Paul Shen (HPCA, 2004)

Optimization of data prefetch helper threads with path-expression based statistical modeling. - Tor M. Aamodt; Paul Chow (ICS, 2007)

Dynamic Warp Formation and Scheduling for Efficient GPU Control Flow. - Wilson W. L. Fung; Ivan Sham; George L. Yuan; Tor M. Aamodt (MICRO, 2007)

Pangaea: a tightly-coupled IA32 heterogeneous chip multiprocessor. - Henry Wong; Anne Bracy; Ethan Schuchman; Tor M. Aamodt; Jamison D. Collins; Perry H. Wang; Gautham N. Chinya; Ankur Khandelwal Groen; Hong Jiang; Hong Wang 003 (PACT, 2008)

Compile-time and instruction-set methods for improving floating- to fixed-point conversion accuracy. - Tor M. Aamodt; Paul Chow (ACM Trans. Embed. Comput. Syst., 2008)

A first-order fine-grained multithreaded throughput model. - Xi E. Chen; Tor M. Aamodt (HPCA, 2009)

Analyzing CUDA workloads using a detailed GPU simulator. - Ali Bakhoda; George L. Yuan; Wilson W. L. Fung; Henry Wong; Tor M. Aamodt (ISPASS, 2009)

Complexity effective memory access scheduling for many-core accelerator architectures. - George L. Yuan; Ali Bakhoda; Tor M. Aamodt (MICRO, 2009)

Dynamic warp formation: Efficient MIMD control flow on SIMD graphics hardware. - Wilson W. L. Fung; Ivan Sham; George L. Yuan; Tor M. Aamodt (ACM Trans. Archit. Code Optim., 2009)

On-chip network design considerations for compute accelerators. - Ali Bakhoda; John Kim 001; Tor M. Aamodt (PACT, 2010)

Visualizing complex dynamics in many-core accelerator architectures. - Aaron Ariel; Wilson W. L. Fung; Andrew E. Turner; Tor M. Aamodt (ISPASS, 2010)

Accelerating trace computation in post-silicon debug. - Johnny J. W. Kuan; Steven J. E. Wilton; Tor M. Aamodt (ISQED, 2010)

Throughput-Effective On-Chip Networks for Manycore Accelerators. - Ali Bakhoda; John Kim 001; Tor M. Aamodt (MICRO, 2010)

Thread block compaction for efficient SIMT control flow. - Wilson W. L. Fung; Tor M. Aamodt (HPCA, 2011)

Hardware transactional memory for GPU architectures. - Wilson W. L. Fung; Inderpreet Singh; Andrew Brownsword; Tor M. Aamodt (MICRO, 2011)

Hybrid analytical modeling of pending cache hits, data prefetching, and MSHRs. - Xi E. Chen; Tor M. Aamodt (ACM Trans. Archit. Code Optim., 2011)

Small virtual channel routers on FPGAs through block RAM sharing. - Jimmy Kwa; Tor M. Aamodt (FPT, 2012)

Characterizing and evaluating a key-value store application on heterogeneous CPU-GPU systems. - Tayler H. Hetherington; Timothy G. Rogers; Lisa Hsu; Mike O'Connor; Tor M. Aamodt (ISPASS, 2012)

Cache-Conscious Wavefront Scheduling. - Timothy G. Rogers; Mike O'Connor; Tor M. Aamodt (MICRO, 2012)

Progressive-BackSpace: Efficient Predecessor Computation for Post-Silicon Debug. - Johnny J. W. Kuan; Tor M. Aamodt (MTV, 2012)

Kilo TM: Hardware Transactional Memory for GPU Architectures. - Wilson Wai Lun Fung; Inderpreet Singh; Andrew Brownsword; Tor M. Aamodt (IEEE Micro, 2012)

Modeling Cache Contention and Throughput of Multiprogrammed Manycore Processors. - Xi E. Chen; Tor M. Aamodt (IEEE Trans. Computers, 2012)

Formal-Analysis-Based Trace Computation for Post-Silicon Debug. - Marcel Gort; Flavio M. de Paula; Johnny J. W. Kuan; Tor M. Aamodt; Alan J. Hu; Steven J. E. Wilton; Jin Yang 006 (IEEE Trans. Very Large Scale Integr. Syst., 2012)

GPUDet: a deterministic GPU architecture. - Hadi Jooybar; Wilson W. L. Fung; Mike O'Connor; Joseph Devietti; Tor M. Aamodt (ASPLOS, 2013)

Characterizing the performance benefits of fused CPU/GPU systems using FusionSim. - Vitaly Zakharenko; Tor M. Aamodt; Andreas Moshovos (DATE, 2013)

GPUWattch: enabling energy optimizations in GPGPUs. - Jingwen Leng; Tayler H. Hetherington; Ahmed ElTantawy; Syed Zohaib Gilani; Nam Sung Kim; Tor M. Aamodt; Vijay Janapa Reddi (ISCA, 2013)

Energy efficient GPU transactional memory via space-time optimizations. - Wilson W. L. Fung; Tor M. Aamodt (MICRO, 2013)

Divergence-aware warp scheduling. - Timothy G. Rogers; Mike O'Connor; Tor M. Aamodt (MICRO, 2013)

Cache-Conscious Thread Scheduling for Massively Multithreaded Processors. - Timothy G. Rogers; Mike O'Connor; Tor M. Aamodt (IEEE Micro, 2013)

Designing on-chip networks for throughput accelerators. - Ali Bakhoda; John Kim 001; Tor M. Aamodt (ACM Trans. Archit. Code Optim., 2013)

A scalable multi-path microarchitecture for efficient GPU control flow. - Ahmed ElTantawy; Jessica Wenjie Ma; Mike O'Connor; Tor M. Aamodt (HPCA, 2014)

Scaling usable computing capability. - Tor M. Aamodt (ICSAMOS, 2014)

Learning your limit: managing massively multithreaded caches through scheduling. - Timothy G. Rogers; Mike O'Connor; Tor M. Aamodt (Commun. ACM, 2014)

Cache Coherence for GPU Architectures. - Inderpreet Singh; Arrvindh Shriraman; Wilson W. L. Fung; Mike O'Connor; Tor M. Aamodt (IEEE Micro, 2014)

MemcachedGPU: scaling-up scale-out key-value stores. - Tayler H. Hetherington; Mike O'Connor; Tor M. Aamodt (SoCC, 2015)

SLIP: reducing wire energy in the memory hierarchy. - Subhasis Das; Tor M. Aamodt; William J. Dally (ISCA, 2015)

On-Demand Dynamic Branch Prediction. - Milad Mohammadi; Song Han 003; Tor M. Aamodt; William J. Dally (IEEE Comput. Archit. Lett., 2015)

Reduced-Precision Strategies for Bounded Memory in Deep Neural Nets. - Patrick Judd; Jorge Albericio; Tayler H. Hetherington; Tor M. Aamodt; Natalie D. Enright Jerger; Raquel Urtasun; Andreas Moshovos (CoRR, 2015)

Proteus: Exploiting Numerical Precision Variability in Deep Neural Networks. - Patrick Judd; Jorge Albericio; Tayler H. Hetherington; Tor M. Aamodt; Natalie D. Enright Jerger; Andreas Moshovos (ICS, 2016)

Cnvlutin: Ineffectual-Neuron-Free Deep Neural Network Computing. - Jorge Albericio; Patrick Judd; Tayler H. Hetherington; Tor M. Aamodt; Natalie D. Enright Jerger; Andreas Moshovos (ISCA, 2016)

MIMD synchronization on SIMT architectures. - Ahmed ElTantawy; Tor M. Aamodt (MICRO, 2016)

Stripes: Bit-serial deep neural network computing. - Patrick Judd; Jorge Albericio; Tayler H. Hetherington; Tor M. Aamodt; Andreas Moshovos (MICRO, 2016)

Inter-Core Locality Aware Memory Scheduling. - Dongdong Li; Tor M. Aamodt (IEEE Comput. Archit. Lett., 2016)

CG-OoO: Energy-Efficient Coarse-Grain Out-of-Order Execution. - Milad Mohammadi; Tor M. Aamodt; William J. Dally (CoRR, 2016)

Reuse Distance-Based Probabilistic Cache Replacement. - Subhasis Das; Tor M. Aamodt; William J. Dally (ACM Trans. Archit. Code Optim., 2016)

A state machine block for high-level synthesis. - Shadi Assadikhomami; Jennifer Ongko; Tor M. Aamodt (FPT, 2017)

HoLiSwap: Reducing Wire Energy in L1 Caches. - Yatish Turakhia; Subhasis Das; Tor M. Aamodt; William J. Dally (CoRR, 2017)

CG-OoO: Energy-Efficient Coarse-Grain Out-of-Order Execution Near In-Order Energy with Near Out-of-Order Performance. - Milad Mohammadi; Tor M. Aamodt; William J. Dally (ACM Trans. Archit. Code Optim., 2017)

Warp Scheduling for Fine-Grained Synchronization. - Ahmed ElTantawy; Tor M. Aamodt (HPCA, 2018)

Identifying and Exploiting Ineffectual Computations to Enable Hardware Acceleration of Deep Learning. - Andreas Moshovos; Jorge Albericio; Patrick Judd; Alberto Delmas; Sayeh Sharify; Mostafa Mahmoud; Tayler H. Hetherington; Milos Nikolic 002; Dylan Malone Stuart; Kevin Siu; Zissis Poulos; Tor M. Aamodt; et al. (NEWCAS, 2018)

Exploiting Typical Values to Accelerate Deep Learning. - Andreas Moshovos; Jorge Albericio; Patrick Judd; Alberto Delmas Lascorz; Sayeh Sharify; Zissis Poulos; Tayler H. Hetherington; Tor M. Aamodt; Natalie D. Enright Jerger (Computer, 2018)

Exploring Modern GPU Memory System Design Challenges through Accurate Modeling. - Mahmoud Khairy; Akshay Jain 005; Tor M. Aamodt; Timothy G. Rogers (CoRR, 2018)

Value-Based Deep-Learning Acceleration. - Andreas Moshovos; Jorge Albericio; Patrick Judd; Alberto Delmas Lascorz; Sayeh Sharify; Tayler H. Hetherington; Tor M. Aamodt; Natalie D. Enright Jerger (IEEE Micro, 2018)

Proteus: Exploiting precision variability in deep neural networks. - Patrick Judd; Jorge Albericio; Tayler H. Hetherington; Tor M. Aamodt; Natalie D. Enright Jerger; Raquel Urtasun; Andreas Moshovos (Parallel Comput., 2018)

General-Purpose Graphics Processor Architectures - Tor M. Aamodt; Wilson Wai Lun Fung; Timothy G. Rogers (Morgan & Claypool Publishers, 2018)

EDGE: Event-Driven GPU Execution. - Tayler Hicklin Hetherington; Maria Lubeznov; Deval Shah; Tor M. Aamodt (PACT, 2019)

Emerald: graphics modeling for SoC systems. - Ayub A. Gubran; Tor M. Aamodt (ISCA, 2019)

A Detailed Model for Contemporary GPU Memory Systems. - Mahmoud Khairy; Akshay Jain 005; Tor M. Aamodt; Timothy G. Rogers (ISPASS, 2019)

Analyzing Machine Learning Workloads Using a Detailed GPU Simulator. - Jonathan S. Lew; Deval A. Shah; Suchita Pati; Shaylin Cattell; Mengchi Zhang; Amruth Sandhupatla; Christopher Ng; Negar Goli; Matthew D. Sinclair; Timothy G. Rogers; Tor M. Aamodt (ISPASS, 2019)

Modeling Deep Learning Accelerator Enabled GPUs. - Md Aamir Raihan; Negar Goli; Tor M. Aamodt (ISPASS, 2019)

Surface Compression Using Dynamic Color Palettes. - Ayub A. Gubran; Felix Huang; Tor M. Aamodt (CoRR, 2019)

Hash-Based Ray Path Prediction: Skipping BVH Traversal Computation by Exploiting Ray Locality. - Francois Demoullin; Ayub A. Gubran; Tor M. Aamodt (CoRR, 2019)

Bandwidth Bottleneck in Network-on-Chip for High-Throughput Processors. - Jiho Kim; Sanghun Cho; Minsoo Rhu; Ali Bakhoda; Tor M. Aamodt; John Kim 001 (PACT, 2020)

ReSprop: Reuse Sparsified Backpropagation. - Negar Goli; Tor M. Aamodt (CVPR, 2020)

JPEG-ACT: Accelerating Deep Learning via Transform-based Lossy Compression. - R. David Evans; Lufei Liu; Tor M. Aamodt (ISCA, 2020)

Accel-Sim: An Extensible Simulation Framework for Validated GPU Modeling. - Mahmoud Khairy; Zhesheng Shen; Tor M. Aamodt; Timothy G. Rogers (ISCA, 2020)

Deterministic Atomic Buffering. - Yuan-Hsi Chou; Christopher Ng; Shaylin Cattell; Jeremy Intan; Matthew D. Sinclair; Joseph Devietti; Timothy G. Rogers; Tor M. Aamodt (MICRO, 2020)

Sparse Weight Activation Training. - Md Aamir Raihan; Tor M. Aamodt (NeurIPS, 2020)

Energy Efficient On-Demand Dynamic Branch Prediction Models. - Milad Mohammadi; Song Han 003; Ehsan Atoofian; Amirali Baniasadi; Tor M. Aamodt; William J. Dally (IEEE Trans. Computers, 2020)

AccelWattch: A Power Modeling Framework for Modern GPUs. - Vijay Kandiah; Scott Peverelle; Mahmoud Khairy; Junrui Pan; Amogh Manjunath; Timothy G. Rogers; Tor M. Aamodt; Nikos Hardavellas (MICRO, 2021)

Intersection Prediction for Accelerated GPU Ray Tracing. - Lufei Liu; Wesley Chang; Francois Demoullin; Yuan-Hsi Chou; Mohammadreza Saed; David Pankratz; Tyler Nowicki; Tor M. Aamodt (MICRO, 2021)

AC-GC: Lossy Activation Compression with Guaranteed Convergence. - R. David Evans; Tor M. Aamodt (NeurIPS, 2021)

Characterizing and Improving the Resilience of Accelerators in Autonomous Robots. - Deval Shah; Zi Yu Xue; Karthik Pattabiraman; Tor M. Aamodt (CoRR, 2021)

Label Encoding for Regression Networks. - Deval Shah; Zi Yu Xue; Tor M. Aamodt (ICLR, 2022)

Anticipating and eliminating redundant computations in accelerated sparse training. - Jonathan S. Lew; Yunpeng Liu 007; Wenyi Gong; Negar Goli; R. David Evans; Tor M. Aamodt (ISCA, 2022)

Vulkan-Sim: A GPU Architecture Simulator for Ray Tracing. - Mohammadreza Saed; Yuan-Hsi Chou; Lufei Liu; Tyler Nowicki; Tor M. Aamodt (MICRO, 2022)

Learning Label Encodings for Deep Regression. - Deval Shah; Tor M. Aamodt (ICLR, 2023)

LumiBench: A Benchmark Suite for Hardware Ray Tracing. - Lufei Liu; Mohammadreza Saed; Yuan-Hsi Chou; Davit Grigoryan; Tyler Nowicki; Tor M. Aamodt (IISWC, 2023)

Energy-Efficient Realtime Motion Planning. - Deval Shah; Ningfeng Yang; Tor M. Aamodt (ISCA, 2023)

Treelet Prefetching For Ray Tracing. - Yuan-Hsi Chou; Tyler Nowicki; Tor M. Aamodt (MICRO, 2023)

GhOST: a GPU Out-of-Order Scheduling Technique for Stall Reduction. - Ishita Chaturvedi; Bhargav Reddy Godala; Yucan Wu; Ziyang Xu; Konstantinos Iliakis; Panagiotis-Eleftherios Eleftherakis; Sotirios Xydis; Dimitrios Soudris; Tyler Sorensen 001; Simone Campanoni; Tor M. Aamodt; David I. August (ISCA, 2024)

Collision Prediction for Robotics Accelerators. - Deval Shah; Tor M. Aamodt (ISCA, 2024)

Zatel: Sample Complexity-Aware Scale-Model Simulation for Ray Tracing. - Davit Grigoryan; Yuan-Hsi Chou; Tor M. Aamodt (ISPASS, 2024)

Generalizing Ray Tracing Accelerators for Tree Traversals on GPUs. - Dongho Ha; Lufei Liu; Yuan-Hsi Chou; Seokjin Go; Won Woo Ro; Hung-Wei Tseng 001; Tor M. Aamodt (MICRO, 2024)

Uncovering Real GPU NoC Characteristics: Implications on Interconnect Architecture. - Zhixian Jin; Christopher Rocca; Jiho Kim; Hans Kasan; Minsoo Rhu; Ali Bakhoda; Tor M. Aamodt; John Kim 001 (MICRO, 2024)

Graph-Based Identification of Qubit Network (GidNET) for Qubit Reuse. - Gideon Uchehara; Tor M. Aamodt; Olivia Di Matteo (QCE, 2024)

Characterizing and Improving Resilience of Accelerators to Memory Errors in Autonomous Robots. - Deval Shah; Zi Yu Xue; Karthik Pattabiraman; Tor M. Aamodt (ACM Trans. Cyber Phys. Syst., 2024)

Treelet Accelerated Ray Tracing on GPUs. - Yuan-Hsi Chou; Tor M. Aamodt (ASPLOS (2), 2025)

ReFrame: Layer Caching for Accelerated Inference in Real-Time Rendering. - Lufei Liu; Tor M. Aamodt (CoRR, 2025)