Multiple stuck-at fault testability of a combinational circuit derived by covering ROBDD nodes by Invert-And-Or sub-circuits. - Anzhela Yu. Matrosova; Eugeniy Mitrofanov; Toral Shah (EWDTS, 2015)

Simplification of fully delay testable combinational circuits. - Anzhela Yu. Matrosova; Eugeniy Mitrofanov; Toral Shah (IOLTS, 2015)

PDF testability of a combinational circuit derived by covering ROBDD nodes using Invert-And-Or circuits. - Toral Shah; Anzhela Yu. Matrosova; Virendra Singh (VDAT, 2015)

ROBDD based path delay fault testable combinational circuit synthesis. - Toral Shah; Virendra Singh; Anzhela Yu. Matrosova (EWDTS, 2016)

Test pattern generation to detect multiple faults in ROBDD based combinational circuits. - Toral Shah; Anzhela Yu. Matrosova; Virendra Singh (IOLTS, 2017)

Testing multiple stuck-at faults of ROBDD based combinational circuit design. - Toral Shah; Anzhela Yu. Matrosova; Binod Kumar 001; Masahiro Fujita; Virendra Singh (LATS, 2017)

Multiple Stuck-at Fault Testability Analysis of ROBDD Based Combinational Circuit Design. - Toral Shah; Anzhela Yu. Matrosova; Masahiro Fujita; Virendra Singh (J. Electron. Test., 2018)