An optimal chip compaction method based on shortest path algorithm with automatic jog insertion. - Toru Awashima; Wataru Yamamoto; Masao Sato; Tatsuo Ohtsuki (ICCAD, 1992)

Implementing and Evaluating Stream Applications on the Dynamically Reconfigurable Processor. - Noriaki Suzuki; Shunsuke Kurotaki; Masayasu Suzuki; Naoto Kaneko; Yutaka Yamada; Katsuaki Deguchi; Yohei Hasegawa; Hideharu Amano; Kenichiro Anjo; Masato Motomura; Kazutoshi Wakabayashi; Takeo Toi; et al. (FCCM, 2004)

Stream applications on the dynamically reconfigurable processor. - Masayasu Suzuki; Yohei Hasegawa; Yutaka Yamada; Naoto Kaneko; Katsuaki Deguchi; Hideharu Amano; Kenichiro Anjo; Masato Motomura; Kazutoshi Wakabayashi; Takao Toi; Toru Awashima (FPT, 2004)

Implementing core tasks of JPEG2000 Encoder on the Dynamically Reconfigurable Processor. - Katsuaki Deguchi; Shohei Abe; Masayasu Suzuki; Kenichiro Anjo; Toru Awashima; Hideharu Amano (ARCS Workshops, 2005)

An Adaptive Cryptographic Accelerator for IPsec on Dynamically Reconfigurable Processor. - Yohei Hasegawa; Shohei Abe; Hiroki Matsutani; Hideharu Amano; Kenichiro Anjo; Toru Awashima (FPT, 2005)

High-level synthesis challenges and solutions for a dynamically reconfigurable processor. - Takao Toi; Noritsugu Nakamura; Yoshinosuke Kato; Toru Awashima; Kazutoshi Wakabayashi; Li Jing (ICCAD, 2006)

Wire congestion aware synthesis for a dynamically reconfigurable processor. - Takao Toi; Takumi Okamoto; Toru Awashima; Kazutoshi Wakabayashi; Hideharu Amano (FPT, 2010)

High-level Synthesis Challenges for Mapping a Complete Program on a Dynamically Reconfigurable Processor. - Takao Toi; Noritsugu Nakamura; Yoshinosuke Kato; Toru Awashima; Kazutoshi Wakabayashi (IPSJ Trans. Syst. LSI Des. Methodol., 2010)

Panel discussions: Impact on society by fusion and harmony of mobile devices, servers, and networks - Their direction of evolutions and optimal roles. - Masato Motomura; Takafumi Aoki; Toru Awashima; Toru Baji; Masaaki Ishikawa (COOL Chips, 2011)

Iterative Synthesis Methods Estimating Programmable-Wire Congestion in a Dynamically Reconfigurable Processor. - Takao Toi; Takumi Okamoto; Toru Awashima; Kazutoshi Wakabayashi; Hideharu Amano (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2011)

Optimizing time and space multiplexed computation in a dynamically reconfigurable processor. - Takao Toi; Noritsugu Nakamura; Taro Fujii; Toshiro Kitaoka; Katsumi Togawa; Koichiro Furuta; Toru Awashima (FPT, 2013)