34.4 A 3nm, 32.5TOPS/W, 55.0TOPS/mm2 and 3.78Mb/mm2 Fully-Digital Compute-in-Memory Macro Supporting INT12 × INT12 with a Parallel-MAC Architecture and Foundry 6T-SRAM Bit Cell. - Hidehiro Fujiwara; Haruki Mori; Wei-Chang Zhao; Kinshuk Khare; Cheng-En Lee; Xiaochen Peng; Vineet Joshi; Chao-Kai Chuang; Shu-Huan Hsu; Takeshi Hashizume; Toshiaki Naganuma; Chen-Hung Tien; et al. (ISSCC, 2024)