An 0.08 e-. pJ/step 14-bit gain-adaptive single-slope column ADC with enhanced HDR function for high-quality imagers. - Luong Hung; Koji Matsuura; Hiroki Suto; Kazutoshi Kodama; Yosuke Tanaka; Toshiaki Ono; Junichiro Fujimagari; Kentaro Akiyama; Miho Akahide; Yoshiaki Inada (VLSI Technology and Circuits, 2023)