Multistage Interconnection Networks with Multiple Outlets. - Toshihiro Hanawa; Hideharu Amano; Yoshifumi Fujikawa (ICPP (1), 1994)

An analysis of the hot spot contention and message combining on the simple serial synchronized-multistage interconnection network. - Kalidou Gaye; Toshihiro Hanawa; Hideharu Amano (Syst. Comput. Jpn., 1995)

Hot spot contention and message combining in the simple serial synchronized multistage interconnection network. - Toshihiro Hanawa; Takashi Fujiwara; Hideharu Amano (SPDP, 1996)

Adaptive Routing on the Recursive Diagonal Torus. - Akira Funahashi; Toshihiro Hanawa; Hideharu Amano; Tomohiro Kudoh (ISHPC, 1997)

The MINC (Multistage Interconnection Network with Cache Control Mechanism) Chip. - Takashi Midorikawa; Takayuki Kamei; Toshihiro Hanawa; Hideharu Amano (ASP-DAC, 1998)

Performance evaluation of SNAIL: A multiprocessor based on the simple serial synchronized multistage interconnection network architecture. - Junji Yamamoto; Takashi Fujiwara; T. Komeda; Takayuki Kamei; Toshihiro Hanawa; Hideharu Amano (Parallel Comput., 1999)

Performance Evaluation of 3-Dimensional MIN with Cache Consistency Maintenance Mechanism. - Yasuki Tanabe; Takashi Midorikawa; Daisuke Shiraishi; Masayoshi Shigeno; Toshihiro Hanawa; Hideharu Amano (PDPTA, 2003)

Implementation of ISIS-SimpleScalar. - Toshihiro Hanawa; Toshiya Minai; Yasuki Tanabe; Hideharu Amano (PDPTA, 2005)

The performance of SNAIL-2 (a SSS-MIN connected multiprocessor with cache coherent mechanism). - Takashi Midorikawa; Daisuke Shiraishi; Masayoshi Shigeno; Yasuki Tanabe; Toshihiro Hanawa; Hideharu Amano (Parallel Comput., 2005)

RI2N: High-bandwidth and fault-tolerant network with multi-link Ethernet for PC clusters. - Shin'ichi Miura; Takayuki Okamoto; Taisuke Boku; Toshihiro Hanawa; Mitsuhisa Sato (CLUSTER, 2008)

A dynamic routing control system for high-performance PC cluster with multi-path Ethernet connection. - Shin'ichi Miura; Taisuke Boku; Takayuki Okamoto; Toshihiro Hanawa (IPDPS, 2008)

Flexible Multi-link Ethernet Binding System for PC Clusters with Asymmetric Topology. - Taiga Yonemoto; Shin'ichi Miura; Toshihiro Hanawa; Taisuke Boku; Mitsuhisa Sato (ICPADS, 2009)

RI2N/DRV: Multi-link ethernet for high-bandwidth and fault-tolerant network on PC clusters. - Shin'ichi Miura; Toshihiro Hanawa; Taiga Yonemoto; Taisuke Boku; Mitsuhisa Sato (IPDPS, 2009)

Towards an Open Dependable Operating System. - Yutaka Ishikawa; Hajime Fujita 002; Toshiyuki Maeda; Motohiko Matsuda; Midori Sugaya; Mitsuhisa Sato; Toshihiro Hanawa; Shin'ichi Miura; Taisuke Boku; Yuki Kinebuchi; Lei Sun; Tatsuo Nakajima; et al. (ISORC, 2009)

Evaluation of Multicore Processors for Embedded Systems by Parallel Benchmark Program Using OpenMP. - Toshihiro Hanawa; Mitsuhisa Sato; Jinpil Lee; Takayuki Imada; Hideaki Kimura 003; Taisuke Boku (IWOMP, 2009)

D-Cloud: Design of a Software Testing Environment for Reliable Distributed Systems Using Cloud Computing Technology. - Takayuki Banzai; Hitoshi Koizumi; Ryo Kanbayashi; Takayuki Imada; Toshihiro Hanawa; Mitsuhisa Sato (CCGRID, 2010)

PEARL: Power-Aware, Dependable, and High-Performance Communication Link Using PCI Express. - Toshihiro Hanawa; Taisuke Boku; Shin'ichi Miura; Mitsuhisa Sato; Kazutami Arimoto (GreenCom/CPSCom, 2010)

Large-Scale Software Testing Environment Using Cloud Computing Technology for Dependable Parallel and Distributed Systems. - Toshihiro Hanawa; Takayuki Banzai; Hitoshi Koizumi; Ryo Kanbayashi; Takayuki Imada; Mitsuhisa Sato (ICST Workshops, 2010)

Customizing Virtual Machine with Fault Injector by Integrating with SpecC Device Model for a Software Testing Environment D-Cloud. - Toshihiro Hanawa; Hitoshi Koizumi; Takayuki Banzai; Mitsuhisa Sato; Shin'ichi Miura; Tadatoshi Ishii; Hidehisa Takamizawa (PRDC, 2010)

An 80 Gbps dependable multicore communication SoC with PCI express I/F and intelligent interrupt controller. - Sugako Otani; Hiroyuki Kondo; Itaru Nonomura; Atsuyuki Ikeya; Minoru Uemura; Katsushi Asahina; Kazutami Arimoto; Shin'ichi Miura; Toshihiro Hanawa; Taisuke Boku; Mitsuhisa Sato (COOL Chips, 2011)

XMCAPI: Inter-core Communication Interface on Multi-chip Embedded Systems. - Shin'ichi Miura; Toshihiro Hanawa; Taisuke Boku; Mitsuhisa Sato (EUC, 2011)

PEARL and PEACH: A Novel PCI Express Direct Link and Its Implementation. - Toshihiro Hanawa; Taisuke Boku; Shin'ichi Miura; Mitsuhisa Sato; Kazutami Arimoto (IPDPS Workshops, 2011)

An 80Gb/s dependable communication SoC with PCI express I/F and 8 CPUs. - Sugako Otani; Hiroyuki Kondo; Itaru Nonomura; Atsuyuki Ikeya; Minoru Uemura; Yasushi Hayakawa; Takeshi Oshita; Satoshi Kaneko; Katsushi Asahina; Kazutami Arimoto; Shin'ichi Miura; Toshihiro Hanawa; et al. (ISSCC, 2011)

Peach: A Multicore Communication System on Chip with PCI Express. - Sugako Otani; Hiroyuki Kondo; Itaru Nonomura; Toshihiro Hanawa; Shin'ichi Miura; Taisuke Boku (IEEE Micro, 2011)

DS-Bench Toolset: Tools for dependability benchmarking with simulation and assurance. - Hajime Fujita 002; Yutaka Matsuno; Toshihiro Hanawa; Mitsuhisa Sato; Shinpei Kato; Yutaka Ishikawa (DSN, 2012)

GPU/CPU Work Sharing with Parallel Language XcalableMP-dev for Parallelized Accelerated Computing. - Tetsuya Odajima; Taisuke Boku; Toshihiro Hanawa; Jinpil Lee; Mitsuhisa Sato (ICPP Workshops, 2012)

Task level pipelining with PEACH2: An FPGA switching fabric for high performance computing. - Takaaki Miyajima; Takuya Kuhara; Toshihiro Hanawa; Hideharu Amano; Taisuke Boku (FPT, 2013)

Interconnection Network for Tightly Coupled Accelerators Architecture. - Toshihiro Hanawa; Yuetsu Kodama; Taisuke Boku; Mitsuhisa Sato (Hot Interconnects, 2013)

Adaptive Task Size Control on High Level Programming for GPU/CPU Work Sharing. - Tetsuya Odajima; Taisuke Boku; Mitsuhisa Sato; Toshihiro Hanawa; Yuetsu Kodama; Raymond Namyst; Samuel Thibault; Olivier Aumage (ICA3PP (2), 2013)

Tightly Coupled Accelerators Architecture for Minimizing Communication Latency among Accelerators. - Toshihiro Hanawa; Yuetsu Kodama; Taisuke Boku; Mitsuhisa Sato (IPDPS Workshops, 2013)

QCD Library for GPU Cluster with Proprietary Interconnect for GPU Direct Communication. - Norihisa Fujita; Hisafumi Fujii; Toshihiro Hanawa; Yuetsu Kodama; Taisuke Boku; Yoshinobu Kuramashi; Mike Clark (Euro-Par Workshops (1), 2014)

A Preliminarily Evaluation of PEACH3: A Switching Hub for Tightly Coupled Accelerators. - Takuya Kuhara; Takahiro Kaneda; Toshihiro Hanawa; Yuetsu Kodama; Taisuke Boku; Hideharu Amano (CANDAR, 2014)

XcalableACC: extension of XcalableMP PGAS language using OpenACC for accelerator clusters. - Masahiro Nakao; Hitoshi Murai; Takenori Shimosaka; Akihiro Tabuchi; Toshihiro Hanawa; Yuetsu Kodama; Taisuke Boku; Mitsuhisa Sato (WACCPD@SC, 2014)

PEACH2: An FPGA-based PCIe network device for Tightly Coupled Accelerators. - Yuetsu Kodama; Toshihiro Hanawa; Taisuke Boku; Mitsuhisa Sato (SIGARCH Comput. Archit. News, 2014)

Parallelization of cipher algorithm on CPU/GPU for real-time software-defined access network. - Takahiro Suzuki; Sang-Yuep Kim; Junichi Kani; Ken-Ichi Suzuki; Akihiro Otaka; Toshihiro Hanawa (APSIPA, 2015)

Towards Unification of Accelerated Computing and Interconnection For Extreme-Scale Computing. - Toshihiro Hanawa; Yuetsu Kodama; Taisuke Boku; Hideharu Amano; Hitoshi Murai; Masayuki Umemura; Mitsuhisa Sato (ARC, 2015)

Evaluation of FFT for GPU Cluster Using Tightly Coupled Accelerators Architecture. - Toshihiro Hanawa; Hisafumi Fujii; Norihisa Fujita; Tetsuya Odajima; Kazuya Matsumoto; Taisuke Boku (CLUSTER, 2015)

Improving Strong-Scaling on GPU Cluster Based on Tightly Coupled Accelerators Architecture. - Toshihiro Hanawa; Hisafumi Fujii; Norihisa Fujita; Tetsuya Odajima; Kazuya Matsumoto; Yuetsu Kodama; Taisuke Boku (CLUSTER, 2015)

Hybrid Communication with TCA and InfiniBand on a Parallel Programming Language XcalableACC for GPU Clusters. - Tetsuya Odajima; Taisuke Boku; Toshihiro Hanawa; Hitoshi Murai; Masahiro Nakao; Akihiro Tabuchi; Mitsuhisa Sato (CLUSTER, 2015)

Reduction calculator in an FPGA based switching Hub for high performance clusters. - Takuya Kuhara; Chiharu Tsuruta; Toshihiro Hanawa; Hideharu Amano (FPL, 2015)

Implementation of CG Method on GPU Cluster with Proprietary Interconnect TCA for GPU Direct Communication. - Kazuya Matsumoto; Toshihiro Hanawa; Yuetsu Kodama; Hisafumi Fujii; Taisuke Boku (IPDPS Workshops, 2015)

From FLOPS to BYTES: disruptive change in high-performance computing towards the post-moore era. - Satoshi Matsuoka; Hideharu Amano; Kengo Nakajima; Koji Inoue; Tomohiro Kudoh; Naoya Maruyama; Kenjiro Taura; Takeshi Iwashita; Takahiro Katagiri; Toshihiro Hanawa; Toshio Endo (Conf. Computing Frontiers, 2016)

Implementation and Evaluation of NAS Parallel CG Benchmark on GPU Cluster with Proprietary Interconnect TCA. - Kazuya Matsumoto; Norihisa Fujita; Toshihiro Hanawa; Taisuke Boku (VECPAR, 2016)

Performance Evaluation of PEACH3: Field-Programmable Gate Array Switch for Tightly Coupled Accelerators. - Takahiro Kaneda; Ryotaro Sakai; Naoki Nishikawa; Toshihiro Hanawa; Chiharu Tsuruta; Hideharu Amano (HEART, 2017)

Communication-Computation Overlapping with Dynamic Loop Scheduling for Preconditioned Parallel Iterative Solvers on Multicore and Manycore Clusters. - Kengo Nakajima; Toshihiro Hanawa (ICPP Workshops, 2017)

Load-Balancing-Aware Parallel Algorithms of H-Matrices with Adaptive Cross Approximation for GPUs. - Tetsuya Hoshino; Akihiro Ida; Toshihiro Hanawa; Kengo Nakajima (CLUSTER, 2018)

Scaling collectives on large clusters using Intel(R) architecture processors and fabric. - Masashi Horikoshi; Larry Meadows; Tom Elken; Pradeep Sivakumar; Edward Mascarenhas; James Erwin; Dmitry Durnov; Alexander Sannikov; Toshihiro Hanawa; Taisuke Boku (HPC Asia Workshops, 2018)

Design of Parallel BEM Analyses Framework for SIMD Processors. - Tetsuya Hoshino; Akihiro Ida; Toshihiro Hanawa; Kengo Nakajima (ICCS (1), 2018)

Coherent Receiver DSP Implemented on a General-Purpose Server for Full Software-Defined Optical Access. - Sang-Yuep Kim; Takahiro Suzuki; Junichi Kani; Akihiro Otaka; Toshihiro Hanawa (OFC, 2018)

10-Gbps Real-time Burst-Frame Synchronization Using Dual-Stage Detection for Full-Software Optical Access Systems. - Takahiro Suzuki; Sang-Yuep Kim; Junichi Kani; Akihiro Otaka; Toshihiro Hanawa (OFC, 2018)

Evaluation of XcalableACC with tightly coupled accelerators/InfiniBand hybrid communication on accelerated cluster. - Masahiro Nakao; Tetsuya Odajima; Hitoshi Murai; Akihiro Tabuchi; Norihisa Fujita; Toshihiro Hanawa; Taisuke Boku; Mitsuhisa Sato (Int. J. High Perform. Comput. Appl., 2019)

Analysis of Cooling Water Temperature Impact on Computing Performance and Energy Consumption. - Jorji Nonaka; Toshihiro Hanawa; Fumiyoshi Shoji (CLUSTER, 2020)

Distribution System for Japanese Synthetic Population Data with Protection Level. - Tadahiko Murata; Susumu Date; Yusuke Goto; Toshihiro Hanawa; Takuya Harada; Manabu Ichikawa; Lee Hao; Masaharu Munetomo; Akiyoshi Sugiki (ICMLC, 2020)

Footprint-Aware Power Capping for Hybrid Memory Based Systems. - Eishi Arima; Toshihiro Hanawa; Carsten Trinitis; Martin Schulz 001 (ISC, 2020)

Development of training environment for deep learning with medical images on supercomputer system based on asynchronous parallel Bayesian optimization. - Yukihiro Nomura; Issei Sato; Toshihiro Hanawa; Shouhei Hanaoka; Takahiro Nakao; Tomomi Takenaga; Tetsuya Hoshino; Yuji Sekiya; Soichiro Miki; Takeharu Yoshikawa; Naoto Hayashi; Osamu Abe (J. Supercomput., 2020)

Automatic Graph Partitioning for Very Large-scale Deep Learning. - Masahiro Tanaka; Kenjiro Taura; Toshihiro Hanawa; Kentaro Torisawa (IPDPS, 2021)

Optimizations of H-matrix-vector Multiplication for Modern Multi-core Processors. - Tetsuya Hoshino; Akihiro Ida; Toshihiro Hanawa (CLUSTER, 2022)

mdx: A Cloud Platform for Supporting Data Science and Cross-Disciplinary Research Collaborations. - Toyotaro Suzumura; Akiyoshi Sugiki; Hiroyuki Takizawa; Akira Imakura; Hiroshi Nakamura; Kenjiro Taura; Tomohiro Kudoh; Toshihiro Hanawa; Yuji Sekiya; Hill Hiroki Kobayashi; Yohei Kuga; Ryo Nakamura; et al. (DASC/PiCom/CBDCom/CyberSciTech, 2022)

Offloading Transprecision Calculation Using FPGA. - Tadayoshi Hara; Toshihiro Hanawa (HPC Asia Workshops, 2022)

A Process Management Runtime with Dynamic Reconfiguration. - Shinji Sumimoto; Toshihiro Hanawa; Kengo Nakajima (HPC Asia Workshops, 2022)

A System-Wide Communication to Couple Multiple MPI Programs for Heterogeneous Computing. - Shinji Sumimoto; Takashi Arakawa; Yoshio Sakaguchi; Hiroya Matsuba; Hisashi Yashiro; Toshihiro Hanawa; Kengo Nakajima (PDCAT, 2022)

mdx: A Cloud Platform for Supporting Data Science and Cross-Disciplinary Research Collaborations. - Toyotaro Suzumura; Akiyoshi Sugiki; Hiroyuki Takizawa; Akira Imakura; Hiroshi Nakamura; Kenjiro Taura; Tomohiro Kudoh; Toshihiro Hanawa; Yuji Sekiya; Hill Hiroki Kobayashi; Shin Matsushima; Yohei Kuga; et al. (CoRR, 2022)

Dynamic Core Binding for Load Balancing of Applications Parallelized with MPI/OpenMP. - Masatoshi Kawai; Akihiro Ida; Toshihiro Hanawa; Kengo Nakajima (ICCS (3), 2023)

Preliminary Performance Evaluation of Grace-Hopper GH200. - Toshihiro Hanawa; Kengo Nakajima; Yohei Miki 001; Takashi Shimokawabe; Kazuya Yamazaki; Shinji Sumimoto; Osamu Tatebe; Taisuke Boku; Daisuke Takahashi; Akira Nukada; Norihisa Fujita; Ryohei Kobayashi 001; et al. (CLUSTER Workshops, 2024)

Power-Efficiency Variation on A64FX Supercomputers and its Application to System Operation. - Tomoya Kusaba; Yusuke Awaki; Kohei Yoshida; Shinobu Miwa; Hayato Yamaki; Toshihiro Hanawa; Hiroki Honda (CLUSTER Workshops, 2024)

Optimize Efficiency of Utilizing Systems by Dynamic Core Binding. - Masatoshi Kawai; Akihiro Ida; Toshihiro Hanawa; Tetsuya Hoshino (HPC Asia Workshops, 2024)

MPI-Adapter2: An Automatic ABI Translation Library Builder for MPI Application Binary Portability. - Shinji Sumimoto; Toshihiro Hanawa; Kengo Nakajima (HPC Asia Workshops, 2024)

WaitIO-Hybrid: Communication for Coupling MPI Programs Among Heterogeneous Systems. - Shinji Sumimoto; Takashi Arakawa; Yoshio Sakaguchi; Hiroya Matsuba; Satoshi Ohshima; Hisashi Yashiro; Toshihiro Hanawa; Kengo Nakajima (PDCAT, 2024)

Unified Schemes for Directive-Based GPU Offloading. - Yohei Miki 001; Toshihiro Hanawa (IEEE Access, 2024)

Accelerating Heterogeneous Coupling Computing with WaitIO Using RDMA. - Shinji Sumimoto; Takashi Arakawa; Yoshio Sakaguchi; Hiroya Matsuba; Satoshi Ohshima; Hisashi Yashiro; Toshihiro Hanawa; Kengo Nakajima (HPC Asia Workshops, 2025)