A 58-µW Single-Chip Sensor Node Processor with Communication Centric Design. - Shintaro Izumi; Takashi Takeuchi; Takashi Matsuda; Hyeokjong Lee; Toshihiro Konishi; Koh Tsuruda; Yasuharu Sakai; Hiroshi Kawaguchi 001; Chikara Ohta; Masahiko Yoshimoto (IEICE Trans. Electron., 2010)

A 40-nm 640-µm2 45-dB opampless all-digital second-order MASH ΔΣ ADC. - Toshihiro Konishi; Hyeokjong Lee; Shintaro Izumi; Masahiko Yoshimoto; Hiroshi Kawaguchi 001 (ISCAS, 2011)

A Low-Power Multi Resolution Spectrum Sensing Architecture for a Wireless Sensor Network with Cognitive Radio. - Toshihiro Konishi; Shintaro Izumi; Koh Tsuruda; Hyeokjong Lee; Takashi Takeuchi; Masahiko Yoshimoto; Hiroshi Kawaguchi 001 (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2011)

A Low-Power Multi-Phase Oscillator with Transfer Gate Phase Coupler Enabling Even-Numbered Phase Output. - Toshihiro Konishi; Hyeokjong Lee; Shintaro Izumi; Takashi Takeuchi; Masahiko Yoshimoto; Hiroshi Kawaguchi 001 (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2011)

Instantaneous Heart Rate detection using short-time autocorrelation for wearable healthcare systems. - Masanao Nakano; Toshihiro Konishi; Shintaro Izumi; Hiroshi Kawaguchi 001; Masahiko Yoshimoto (EMBC, 2012)

A 51-dB SNDR DCO-based TDC using two-stage second-order noise shaping. - Toshihiro Konishi; Keisuke Okuno; Shintaro Izumi; Masahiko Yoshimoto; Hiroshi Kawaguchi 001 (ISCAS, 2012)

A 62-dB SNDR second-order gated ring oscillator TDC with two-stage dynamic D-type flipflops as a quantization noise propagator. - Keisuke Okuno; Toshihiro Konishi; Shintaro Izumi; Masahiko Yoshimoto; Hiroshi Kawaguchi 001 (NEWCAS, 2012)

A 61-dB SNDR 700 µm2 second-order all-digital TDC with low-jitter frequency shift oscillators and dynamic flipflops. - Toshihiro Konishi; Keisuke Okuno; Shintaro Izumi; Masahiko Yoshimoto; Hiroshi Kawaguchi 001 (VLSIC, 2012)

Noise-tolerant instantaneous heart rate and R-peak detection using short-term autocorrelation for wearable healthcare systems. - Takahide Fujii; Masanao Nakano; Ken Yamashita; Toshihiro Konishi; Shintaro Izumi; Hiroshi Kawaguchi 001; Masahiko Yoshimoto (EMBC, 2013)

A 14 µA ECG processor with robust heart rate monitor for a wearable healthcare system. - Shintaro Izumi; Ken Yamashita; Masanao Nakano; Toshihiro Konishi; Hiroshi Kawaguchi 001; Hiromitsu Kimura; Kyoji Marumoto; Takaaki Fuchikami; Yoshikazu Fujimori; Hiroshi Nakajima; Toshikazu Shiga; Masahiko Yoshimoto (ESSCIRC, 2013)

Temperature compensation using least mean squares for fast settling all-digital phase-locked loop. - Keisuke Okuno; Shintaro Izumi; Toshihiro Konishi; Song Dae-Woo; Masahiko Yoshimoto; Hiroshi Kawaguchi 001 (NEWCAS, 2013)

A 38 μA wearable biosignal monitoring system with near field communication. - Ken Yamashita; Shintaro Izumi; Masanao Nakano; Takahide Fujii; Toshihiro Konishi; Hiroshi Kawaguchi 001; Hiromitsu Kimura; Kyoji Marumoto; Takaaki Fuchikami; Yoshikazu Fujimori; Hiroshi Nakajima; Toshikazu Shiga; et al. (NEWCAS, 2013)

An Opampless Second-Order MASH ΔΣ ADC with Using Gated Ring Oscillator Time-to-Digital Converter. - Toshihiro Konishi; Keisuke Okuno; Shintaro Izumi; Masahiko Yoshimoto; Hiroshi Kawaguchi 001 (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2013)

A Second-Order All-Digital TDC with Low-Jitter Frequency Shift Oscillators and Dynamic Flipflops. - Toshihiro Konishi; Keisuke Okuno; Shintaro Izumi; Masahiko Yoshimoto; Hiroshi Kawaguchi 001 (IEICE Trans. Electron., 2013)

An 8-bit I/O-sized ADC with second-order TDC and MOM capacitor voltage-to-time converter. - Keisuke Okuno; Toshihiro Konishi; Shintaro Izumi; Masahiko Yoshimoto; Hiroshi Kawaguchi 001 (ICECS, 2014)

A 2.23 ps RMS jitter 3 μs fast settling ADPLL using temperature compensation PLL controller. - Keisuke Okuno; Kana Masaki; Shintaro Izumi; Toshihiro Konishi; Hiroshi Kawaguchi 001; Masahiko Yoshimoto (ICECS, 2014)

An I/O-Sized ADC with Second-Order TDC and MOM Capacitor Voltage-to-Time Converter. - Keisuke Okuno; Toshihiro Konishi; Shintaro Izumi; Masahiko Yoshimoto; Hiroshi Kawaguchi 001 (IEICE Trans. Electron., 2015)

Low-Jitter Design for Second-Order Time-to-Digital Converter Using Frequency Shift Oscillators. - Keisuke Okuno; Toshihiro Konishi; Shintaro Izumi; Masahiko Yoshimoto; Hiroshi Kawaguchi 001 (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2015)