Preliminary performance analysis of flex power FPGA, a power reconfigurable device with fine granularity. - Takashi Kawanami; Masakazu Hioki; Hiroshi Nagase; Toshiyuki Tsutsumi; Tadashi Nakagawa; Toshihiro Sekigawa; Hanpei Koike (FPGA, 2004)

Preliminary Evaluation of Flex Power FPGA: A Power Reconfigurable Architecture with Fine Granularity. - Takashi Kawanami; Masakazu Hioki; Hiroshi Nagase; Toshiyuki Tsutsumi; Tadashi Nakagawa; Toshihiro Sekigawa; Hanpei Koike (IEICE Trans. Inf. Syst., 2004)

XDXMOS: a novel technique for the double-gate MOSFETs logic circuits - to achieve high drive current and small input capacitance together. - Hanpei Koike; Toshihiro Sekigawa (CICC, 2005)

Evaluation of granularity on threshold voltage control in flex power FPGA. - Masakazu Hioki; Takashi Kawanami; Toshiyuki Tsutsumi; Tadashi Nakagawa; Toshihiro Sekigawa; Hanpei Koike (FPT, 2006)

Optimal set of body bias voltages for an FPGA with field-programmable Vth components. - Takashi Kawanami; Masakazu Hioki; Yohei Matsumoto; Toshiyuki Tsutsumi; Tadashi Nakagawa; Toshihiro Sekigawa; Hanpei Koike (FPT, 2006)

Flex-Pass-Gate SRAM Design for Static Noise Margin Enhancement Using FinFET-Based Technology. - Shin-ichi O'Uchi; Meishoku Masahara; Kunihiro Sakamoto; Kazuhiko Endo; Yongxun Liu; Takashi Matsukawa; Toshihiro Sekigawa; Hanpei Koike; Eiichi Suzuki (CICC, 2007)

Performance and yield enhancement of FPGAs with within-die variation using multiple configurations. - Yohei Matsumoto; Masakazu Hioki; Takashi Kawanami; Toshiyuki Tsutsumi; Tadashi Nakagawa; Toshihiro Sekigawa; Hanpei Koike (FPGA, 2007)

A Power Configurable Block Array Connected in Series as First Prototype Flex Power FPGA Chip. - Masakazu Hioki; Takashi Kawanami; Yohei Matsumoto; Tadashi Nakagawa; Toshihiro Sekigawa; Hanpei Koike; Toshiyuki Tsutsumi (FPT, 2007)

Optimization of the Body Bias Voltage Set (BBVS) for Flex Power FPGA. - Takashi Kawanami; Masakazu Hioki; Yohei Matsumoto; Toshiyuki Tsutsumi; Tadashi Nakagawa; Toshihiro Sekigawa; Hanpei Koike (IEICE Trans. Inf. Syst., 2007)

FinFET-Based Flex-Vth SRAM Design for Drastic Standby-Leakage-Current Reduction. - Shin-ichi O'Uchi; Meishoku Masahara; Kazuhiko Endo; Yongxun Liu; Takashi Matsukawa; Kunihiro Sakamoto; Toshihiro Sekigawa; Hanpei Koike; Eiichi Suzuki (IEICE Trans. Electron., 2008)

Suppression of Intrinsic Delay Variation in FPGAs using Multiple Configurations. - Yohei Matsumoto; Masakazu Hioki; Takashi Kawanami; Hanpei Koike; Toshiyuki Tsutsumi; Tadashi Nakagawa; Toshihiro Sekigawa (ACM Trans. Reconfigurable Technol. Syst., 2008)

Realization of 0.7-V analog circuits by adaptive-Vt operation of FinFET. - Shin-ichi O'Uchi; Kazuhiko Endo; Yongxun Liu; Tadashi Nakagawa; Takashi Matsukawa; Yuki Ishikawa; Junichi Tsukada; Toshihiro Sekigawa; Hanpei Koike; Kunihiro Sakamoto; Meishoku Masahara (CICC, 2010)

0.5V FinFET SRAM with dynamic threshold control of pass gates for salvaging malfunctioned bits. - Shin-ichi O'Uchi; Kazuhiko Endo; Yongxun Liu; Tadashi Nakagawa; Takashi Matsukawa; Yuki Ishikawa; Junichi Tsukada; Hiromi Yamauchi; Toshihiro Sekigawa; Hanpei Koike; Kunihiro Sakamoto; Meishoku Masahara (ESSCIRC, 2010)

A 0.7-V Opamp in Scaled Low-Standby-Power FinFET Technology. - Shin-ichi O'Uchi; Kazuhiko Endo; Takashi Matsukawa; Yongxun Liu; Tadashi Nakagawa; Yuki Ishikawa; Junichi Tsukada; Hiromi Yamauchi; Toshihiro Sekigawa; Hanpei Koike; Kunihiro Sakamoto; Meishoku Masahara (IEICE Trans. Electron., 2012)

High-Frequency Precise Characterization of Intrinsic FinFET Channel. - Hideo Sakai; Shin-ichi O'Uchi; Takashi Matsukawa; Kazuhiko Endo; Yongxun Liu; Junichi Tsukada; Yuki Ishikawa; Tadashi Nakagawa; Toshihiro Sekigawa; Hanpei Koike; Kunihiro Sakamoto; Meishoku Masahara; et al. (IEICE Trans. Electron., 2012)

Fully-functional FPGA prototype with fine-grain programmable body biasing. - Masakazu Hioki; Toshihiro Sekigawa; Tadashi Nakagawa; Hanpei Koike; Yohei Matsumoto; Takashi Kawanami; Toshiyuki Tsutsumi (FPGA, 2013)

Impacts of flexible Vth control, low process variability, and steep SS with low on-current of new structure transistors to ultra-low voltage designs. - Yasuhiro Ogasahara; Tadashi Nakagawa; Toshihiro Sekigawa; Toshiyuki Tsutsumi; Hanpei Koike (IEICE Electron. Express, 2015)