An on-chip, electricity-free and single-layer pressure sensor for microfluidic applications. - Chia-Hung Dylan Tsai; Toshiki Nakamura; Makoto Kaneko (IROS, 2015)

12× bit-error acceptable, 300× extended data-retention time, value-aware SSD with vertical 3D-TLC NAND flash memories for image recognition. - Yoshiaki Deguchi; Toshiki Nakamura; Atsuro Kobayashi; Ken Takeuchi (CICC, 2017)

Scene Text Eraser. - Toshiki Nakamura; Anna Zhu; Keiji Yanai; Seiichi Uchida (ICDAR, 2017)

9.1x Error acceptable adaptive artificial neural network coupled LDPC ECC for charge-trap and floating-gate 3D-NAND flash memories. - Toshiki Nakamura; Yoshiaki Deguchi; Ken Takeuchi (CICC, 2018)

Endurance-based Dynamic VTHDistribution Shaping of 3D-TLC NAND Flash Memories to Suppress Both Lateral Charge Migration and Vertical Charge De-trap and Increase Data-retention Time by 2.7x. - Shun Suzuki; Yoshiaki Deguchi; Toshiki Nakamura; Ken Takeuchi (ESSDERC, 2018)

Error elimination ECC by horizontal error detection and vertical-LDPC ECC to increase data-retention time by 230% and acceptable bit-error rate by 90% for 3D-NAND flash SSDs. - Shun Suzuki; Yoshiaki Deguchi; Toshiki Nakamura; Kyoji Mizoguchi; Ken Takeuchi (IRPS, 2018)

Data-Aware Partial ECC with Data Modulation of ReRAM with Non-volatile In-memory Computing for Image Recognition with Deep Neural Network. - Atsuna Hayakawa; Toshiki Nakamura; Yoshiaki Deguchi; Kazuki Maeda; Ken Takeuchi (ISCAS, 2018)

Layer-by-layer Adaptively Optimized ECC of NAND flash-based SSD Storing Convolutional Neural Network Weight for Scene Recognition. - Keita Mizushina; Toshiki Nakamura; Yoshiaki Deguchi; Ken Takeuchi (ISCAS, 2018)

Privacy-Aware Data-Lifetime Control NAND Flash System for Right to be Forgotten with In-3D Vertical Cell Processing. - Shun Suzuki; Kyoji Mizoguchi; Hikaru Watanabe; Toshiki Nakamura; Yoshiaki Deguchi; Keita Mizushina; Ken Takeuchi (A-SSCC, 2019)

Scene Text Magnifier. - Toshiki Nakamura; Anna Zhu; Seiichi Uchida (ICDAR, 2019)

3-D NAND Flash Value-Aware SSD: Error-Tolerant SSD Without ECCs for Image Recognition. - Yoshiaki Deguchi; Toshiki Nakamura; Atsuna Hayakawa; Ken Takeuchi (IEEE J. Solid State Circuits, 2019)

Adaptive Artificial Neural Network-Coupled LDPC ECC as Universal Solution for 3-D and 2-D, Charge-Trap and Floating-Gate NAND Flash Memories. - Toshiki Nakamura; Yoshiaki Deguchi; Ken Takeuchi (IEEE J. Solid State Circuits, 2019)

Description and Discussion on DCASE2020 Challenge Task2: Unsupervised Anomalous Sound Detection for Machine Condition Monitoring. - Yuma Koizumi; Yohei Kawaguchi; Keisuke Imoto; Toshiki Nakamura; Yuki Nikaido; Ryo Tanabe; Harsh Purohit; Kaori Suefusa; Takashi Endo; Masahiro Yasuda; Noboru Harada (DCASE, 2020)

MIMII Due: Sound Dataset for Malfunctioning Industrial Machine Investigation and Inspection with Domain Shifts Due to Changes in Operational and Environmental Conditions. - Ryo Tanabe; Harsh Purohit; Kota Dohi; Takashi Endo; Yuki Nikaido; Toshiki Nakamura; Yohei Kawaguchi (WASPAA, 2021)

n-hot: Efficient bit-level sparsity for powers-of-two neural network quantization. - Yuiko Sakuma; Hiroshi Sumihiro; Jun Nishikawa; Toshiki Nakamura; Ryoji Ikegaya (CoRR, 2021)