Hierarchical design verification for large digital systems. - Tohru Sasaki; Akihiko Yamada; Toshinori Aoyama; Katsutoshi Hasegawa; Shunichi Kato; Shinichi Sato (DAC, 1981)

Timing verification system based on delay time hierarchical nature. - Minoru Nomura; Shinichi Sato; Nobuo Takano; Toshinori Aoyama; Akihiko Yamada (DAC, 1982)

MDS: An improved total system for firmware development. - Kazutoshi Takahashi; Etsuo Takahashi; Tatsushige Bitoh; Toshinori Aoyama; Akihiko Yamada (MICRO, 1982)