A 12.5-ns 16-Mb CMOS SRAM with common-centroid-geometry-layout sense amplifiers. - Koichiro Ishibashi; Kunihiro Komiyaji; Sadayuki Morita; Toshiro Aoto; Shuji Ikeda; Kyoichiro Asayama; Atsuyosi Koike; Toshiaki Yamanaka; Naotaka Hashimoto; Haruhito Iida; Fumio Kojima; Koichi Motohashi; et al. (IEEE J. Solid State Circuits, 1994)