An NMOS Microcomputer Peripheral Interface Unit Incorporating an Analog-to-Digital Converter. - Tsuneo Funabashi; Katsuaki Takagi; Toshiro Tsukada; Hideo Nakamura; Michio Hara (IEEE Trans. Computers, 1980)

Voltage-comparator-based measurement of equivalently sampled substrate noise waveforms in mixed-signal integrated circuits. - Keiko Makie-Fukuda; Takanobu Anbo; Toshiro Tsukada; Tatsuji Matsuura; Masao Hotta (IEEE J. Solid State Circuits, 1996)

Correction to "Voltage-Comparator-Based Measurement of Equivalentiy Samlpled Substrate Noise Wavefor. - Keiko Makie-Fukuda; Takanobu Anbo; Toshiro Tsukada; Tatsuji Matsuura; Masao Hotta (IEEE J. Solid State Circuits, 1996)

A Fast and Accurate Method of Redesigning Analog Subcircuits for Technology Scaling. - Seiji Funaba; Akihiro Kitagawa; Toshiro Tsukada; Goichi Yokomizo (ASP-DAC, 1998)

Substrate noise measurement by using noise-selective voltage comparators in analog and digital mixed-signal integrated circuits. - Keiko Makie-Fukuda; Takanobu Anbo; Toshiro Tsukada (IEEE Trans. Instrum. Meas., 1999)

Offset calibrating comparator array for 1.2-V, 6bit, 4-Gsample/s flash ADCs using 0.13μm generic CMOS technology. - Hiroyuki Okada; Yasuyuki Hashimoto; Kohji Sakata; Toshiro Tsukada; Koichiro Ishibashi (ESSCIRC, 2003)

Substrate-noise and random-fluctuations reduction with self-adjusted forward body bias. - Yoshihide Komatsu; Koichiro Ishibashi; Masaharu Yamamoto; Toshiro Tsukada; Kenji Shimazaki; Mitsuya Fukazawa; Makoto Nagata (CICC, 2005)

An on-chip active decoupling circuit to suppress crosstalk in deep-submicron CMOS mixed-signal SoCs. - Toshiro Tsukada; Yasuyuki Hashimoto; Kohji Sakata; Hiroyuki Okada; Koichiro Ishibashi (IEEE J. Solid State Circuits, 2005)

Low-Voltage and Low-Power Logic, Memory, and Analog Circuit Techniques for SoCs Using 90 nm Technology and Beyond. - Koichiro Ishibashi; Tetsuya Fujimoto; Takahiro Yamashita; Hiroyuki Okada; Yukio Arima; Yasuyuki Hashimoto; Kohji Sakata; Isao Minematsu; Yasuo Itoh; Haruki Toda; Motoi Ichihashi; Yoshihide Komatsu; et al. (IEICE Trans. Electron., 2006)

Complex Bandpass DeltaSigmaAD Modulator Architecture without I, Q-Path Crossing Layout. - Hao San; Akira Hayakawa; Yoshitaka Jingu; Hiroki Wada; Hiroyuki Hagiwara; Kazuyuki Kobayashi; Haruo Kobayashi 001; Tatsuji Matsuura; Kouichi Yahagi; Junya Kudoh; Hideo Nakane; Masao Hotta; et al. (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2006)

High-Speed Continuous-Time Subsampling Bandpass DeltaSigmaAD Modulator Architecture Employing Radio Frequency DAC. - Masafumi Uemori; Haruo Kobayashi 001; Tomonari Ichikawa; Atsushi Wada; Koichiro Mashiko; Toshiro Tsukada; Masao Hotta (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2006)

A Second-Order Multibit Complex Bandpass DeltaSigmaAD Modulator with I, Q Dynamic Matching and DWA Algorithm. - Hao San; Yoshitaka Jingu; Hiroki Wada; Hiroyuki Hagiwara; Akira Hayakawa; Haruo Kobayashi 001; Tatsuji Matsuura; Kouichi Yahagi; Junya Kudoh; Hideo Nakane; Masao Hotta; Toshiro Tsukada; et al. (IEICE Trans. Electron., 2007)

Special Section on Analog Circuit Techniques and Related Topics. - Toshiro Tsukada (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2008)

Non-Quasi-Static Carrier Dynamics of MOSFETs under Low-Voltage Operation. - Masataka Miyake; Daisuke Hori; Norio Sadachika; Uwe Feldmann; Mitiko Miura-Mattausch; Hans Jürgen Mattausch; Takahiro Iizuka; Kazuya Matsuzawa; Yasuyuki Sahara; Teruhiko Hoshida; Toshiro Tsukada (IEICE Trans. Electron., 2009)