Configurable multi-processor architecture and its processor element design. - Tsutomu Nishimura; Takuji Miki; Hiroaki Sugiura 003; Yuki Matsumoto; Masatsugu Kobayashi; Toshiyuki Kato; Tsutomu Eda; Hironori Yamauchi (ASP-DAC, 2006)

A CDFG generating method from C program for LSI design. - Toshiyuki Kato; Takaaki Miyauchi; Yoshizo Osumi; Hironori Yamauchi; Hideto Nishikado; Takaaki Miyake; Shiro Kobayashi (APCCAS, 2008)

Sparse Coding Approach for Multi-Frame Image Super Resolution. - Toshiyuki Kato; Hideitsu Hino; Noboru Murata (CoRR, 2014)

Double Sparse Multi-Frame Image Super Resolution. - Toshiyuki Kato; Hideitsu Hino; Noboru Murata (CoRR, 2015)

Multi-frame image super resolution based on sparse coding. - Toshiyuki Kato; Hideitsu Hino; Noboru Murata (Neural Networks, 2015)

Doubly sparse structure in image super resolution. - Toshiyuki Kato; Hideitsu Hino; Noboru Murata (MLSP, 2016)

Extended Dot Cluster Marker for High-speed 3D Tracking in Dynamic Projection Mapping. - Yoshihiro Watanabe; Toshiyuki Kato; Masatoshi Ishikawa (ISMAR, 2017)

Double sparsity for multi-frame super resolution. - Toshiyuki Kato; Hideitsu Hino; Noboru Murata (Neurocomputing, 2017)