An elastic pipeline mechanism by self-timed circuits. - Shinji Komori; Hidehiro Takata; Toshiyuki Tamura; Fumiyasu Asai; Takio Ohno; Osamu Tomisawa; Tetsuo Yamasaki; Kenji Shima; Katsuhiko Asada; Hiroaki Terada (IEEE J. Solid State Circuits, 1988)

VLSI implementation of a variable-length pipeline scheme for data-driven processors. - Tetsuo Yamasaki; Kenji Shima; Shinji Komori; Hidehiro Takata; Toshiyuki Tamura; Fumiyasu Asai; Takio Ohno; Osamu Tomisawa; Hiroaki Terada (IEEE J. Solid State Circuits, 1989)

A 100-mega-access per second matching memory for a data-driven microprocessor. - Hidehiro Takata; Shinji Komori; Toshiyuki Tamura; Fumiyasu Asai; Hisakazu Sato; Takio Ohno; Takeshi Tokuda; Hiroki Nishikawa; Hirofumi Terada (IEEE J. Solid State Circuits, 1990)

A Data-Driven Architecture for Distributed Parallel Processing. - Toshiyuki Tamura; Shinji Komori; Fumiyasu Asai; Hirono Tsubota; Hisakazu Sato; Hidehiro Takata; Yoshihiro Seguchi; Takeshi Tokuda; Hiroaki Terada (ICCD, 1991)

The perceptions of information systems designers from the United States, Japan, and Korea on success and failure factors. - Dane K. Peterson; Chung S. Kim; Joong Han Kim; Toshiyuki Tamura (Int. J. Inf. Manag., 2002)

IMT-2000 core network node systems. - Toshiyuki Tamura; Tomoya Takahashi; Takashi Morita 002; Koji Ohtaki; Hideo Takeda (IEEE Wirel. Commun., 2003)